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hw/riscv: microchip_pfsoc: Connect a DMA controller
On the Icicle Kit board, the HSS firmware utilizes the on-chip DMA controller to move the 2nd stage bootloader in the system memory. Let's connect a DMA controller to Microchip PolarFire SoC. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-11-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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3 changed files with 27 additions and 0 deletions
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@ -23,6 +23,7 @@
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#define HW_MICROCHIP_PFSOC_H
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#include "hw/char/mchp_pfsoc_mmuart.h"
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#include "hw/dma/sifive_pdma.h"
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#include "hw/sd/cadence_sdhci.h"
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typedef struct MicrochipPFSoCState {
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@ -40,6 +41,7 @@ typedef struct MicrochipPFSoCState {
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MchpPfSoCMMUartState *serial2;
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MchpPfSoCMMUartState *serial3;
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MchpPfSoCMMUartState *serial4;
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SiFivePDMAState dma;
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CadenceSDHCIState sdhci;
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} MicrochipPFSoCState;
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@ -71,6 +73,7 @@ enum {
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MICROCHIP_PFSOC_BUSERR_UNIT4,
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MICROCHIP_PFSOC_CLINT,
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MICROCHIP_PFSOC_L2CC,
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MICROCHIP_PFSOC_DMA,
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MICROCHIP_PFSOC_L2LIM,
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MICROCHIP_PFSOC_PLIC,
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MICROCHIP_PFSOC_MMUART0,
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@ -88,6 +91,14 @@ enum {
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};
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enum {
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MICROCHIP_PFSOC_DMA_IRQ0 = 5,
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MICROCHIP_PFSOC_DMA_IRQ1 = 6,
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MICROCHIP_PFSOC_DMA_IRQ2 = 7,
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MICROCHIP_PFSOC_DMA_IRQ3 = 8,
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MICROCHIP_PFSOC_DMA_IRQ4 = 9,
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MICROCHIP_PFSOC_DMA_IRQ5 = 10,
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MICROCHIP_PFSOC_DMA_IRQ6 = 11,
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MICROCHIP_PFSOC_DMA_IRQ7 = 12,
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MICROCHIP_PFSOC_EMMC_SD_IRQ = 88,
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MICROCHIP_PFSOC_MMUART0_IRQ = 90,
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MICROCHIP_PFSOC_MMUART1_IRQ = 91,
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