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spapr: nested: Add Power11 capability support for Nested PAPR guests in TCG L0

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The Power11 architected and raw mode support in Linux was merged via [1]
and the corresponding support in QEMU is waiting to be added by [2]
which in V6 currently.

Add the Power11 capabilities and the required handling in TCG L0
implementation of the "Nested PAPR API".

Note: This patch is based on [2].

[1] https://lore.kernel.org/all/20240221044623.1598642-1-mpe@ellerman.id.au/
[2] https://lore.kernel.org/all/20240731055022.696051-1-adityag@linux.ibm.com/

Signed-off-by: Amit Machhiwal <amachhiw@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Amit Machhiwal 2024-10-28 14:45:36 +05:30 • committed by Nicholas Piggin
parent 1d7e6318af
commit 6fb6f3096a
2 changed files with 15 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

12
hw/ppc/spapr_nested.c
View file

@ -771,6 +771,7 @@ static void copy_logical_pvr(void *a, void *b, bool set)
if (*pvr_logical_ptr) { if (*pvr_logical_ptr) {
switch (*pvr_logical_ptr) { switch (*pvr_logical_ptr) {
case CPU_POWERPC_LOGICAL_3_10_P11:
case CPU_POWERPC_LOGICAL_3_10: case CPU_POWERPC_LOGICAL_3_10:
pcr = PCR_COMPAT_3_10 | PCR_COMPAT_3_00; pcr = PCR_COMPAT_3_10 | PCR_COMPAT_3_00;
break; break;
@ -1185,6 +1186,12 @@ static target_ulong h_guest_get_capabilities(PowerPCCPU *cpu,
return H_PARAMETER; return H_PARAMETER;
} }
/* P11 capabilities */
if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10_P11, 0,
spapr->max_compat_pvr)) {
env->gpr[4] |= H_GUEST_CAPABILITIES_P11_MODE;
}
/* P10 capabilities */ /* P10 capabilities */
if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0, if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0,
spapr->max_compat_pvr)) { spapr->max_compat_pvr)) {
@ -1227,7 +1234,10 @@ static target_ulong h_guest_set_capabilities(PowerPCCPU *cpu,
env->gpr[4] = 1; env->gpr[4] = 1;
/* set R5 to the first supported Power Processor Mode */ /* set R5 to the first supported Power Processor Mode */
if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0, if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10_P11, 0,
spapr->max_compat_pvr)) {
env->gpr[5] = H_GUEST_CAP_P11_MODE_BMAP;
} else if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_10, 0,
spapr->max_compat_pvr)) { spapr->max_compat_pvr)) {
env->gpr[5] = H_GUEST_CAP_P10_MODE_BMAP; env->gpr[5] = H_GUEST_CAP_P10_MODE_BMAP;
} else if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0, } else if (ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,

5
include/hw/ppc/spapr_nested.h
View file

@ -211,11 +211,14 @@ typedef struct SpaprMachineStateNestedGuest {
#define H_GUEST_CAPABILITIES_COPY_MEM 0x8000000000000000 #define H_GUEST_CAPABILITIES_COPY_MEM 0x8000000000000000
#define H_GUEST_CAPABILITIES_P9_MODE 0x4000000000000000 #define H_GUEST_CAPABILITIES_P9_MODE 0x4000000000000000
#define H_GUEST_CAPABILITIES_P10_MODE 0x2000000000000000 #define H_GUEST_CAPABILITIES_P10_MODE 0x2000000000000000
#define H_GUEST_CAP_VALID_MASK (H_GUEST_CAPABILITIES_P10_MODE | \ #define H_GUEST_CAPABILITIES_P11_MODE 0x1000000000000000
#define H_GUEST_CAP_VALID_MASK (H_GUEST_CAPABILITIES_P11_MODE | \
H_GUEST_CAPABILITIES_P10_MODE | \
H_GUEST_CAPABILITIES_P9_MODE) H_GUEST_CAPABILITIES_P9_MODE)
#define H_GUEST_CAP_COPY_MEM_BMAP 0 #define H_GUEST_CAP_COPY_MEM_BMAP 0
#define H_GUEST_CAP_P9_MODE_BMAP 1 #define H_GUEST_CAP_P9_MODE_BMAP 1
#define H_GUEST_CAP_P10_MODE_BMAP 2 #define H_GUEST_CAP_P10_MODE_BMAP 2
#define H_GUEST_CAP_P11_MODE_BMAP 3
#define PAPR_NESTED_GUEST_MAX 4096 #define PAPR_NESTED_GUEST_MAX 4096
#define H_GUEST_DELETE_ALL_FLAG 0x8000000000000000ULL #define H_GUEST_DELETE_ALL_FLAG 0x8000000000000000ULL
#define PAPR_NESTED_GUEST_VCPU_MAX 2048 #define PAPR_NESTED_GUEST_VCPU_MAX 2048