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target-microblaze: Convert pvr-full to a CPU property
Originally the pvr-full PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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4 changed files with 10 additions and 6 deletions
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@ -130,8 +130,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
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qemu_init_vcpu(cs);
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env->pvr.regs[0] = PVR0_PVR_FULL_MASK \
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| PVR0_USE_BARREL_MASK \
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env->pvr.regs[0] = PVR0_USE_BARREL_MASK \
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| PVR0_USE_DIV_MASK \
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| PVR0_USE_HW_MUL_MASK \
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| PVR0_USE_EXC_MASK \
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@ -166,7 +165,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
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(cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) |
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(cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) |
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(cpu->cfg.endi ? PVR0_ENDI_MASK : 0) |
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(version_code << 16);
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(version_code << 16) |
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(cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0);
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env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |
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(cpu->cfg.use_fpu > 1 ? PVR2_USE_FPU2_MASK : 0);
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@ -228,6 +228,7 @@ static Property mb_properties[] = {
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false),
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DEFINE_PROP_BOOL("endianness", MicroBlazeCPU, cfg.endi, false),
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DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),
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DEFINE_PROP_UINT8("pvr", MicroBlazeCPU, cfg.pvr, C_PVR_FULL),
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DEFINE_PROP_END_OF_LIST(),
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};
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