motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 00:03:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

ioport: do not use CPU_LOG_IOPORT

Browse source 
These messages are disabled by default; a perfect usecase for tracepoints,
which in fact already exist.  Add the missing information to them and
stop using qemu_log_mask.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2015-10-16 15:08:34 +02:00
parent 54c54f8b56
commit 6f94b7d97f
2 changed files with 8 additions and 22 deletions
Download patch file Download diff file Expand all files Collapse all files

26
ioport.c
View file

@ -30,14 +30,6 @@
#include "exec/memory.h"
#include "exec/address-spaces.h"
//#define DEBUG_IOPORT
#ifdef DEBUG_IOPORT
# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
#else
# define LOG_IOPORT(...) do { } while (0)
#endif
typedef struct MemoryRegionPortioList {
MemoryRegion mr;
void *portio_opaque;
@ -62,8 +54,7 @@ const MemoryRegionOps unassigned_io_ops = {
void cpu_outb(pio_addr_t addr, uint8_t val)
{
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
trace_cpu_out(addr, val);
trace_cpu_out(addr, 'b', val);
address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
&val, 1);
}
@ -72,8 +63,7 @@ void cpu_outw(pio_addr_t addr, uint16_t val)
{
uint8_t buf[2];
LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
trace_cpu_out(addr, val);
trace_cpu_out(addr, 'w', val);
stw_p(buf, val);
address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
buf, 2);
@ -83,8 +73,7 @@ void cpu_outl(pio_addr_t addr, uint32_t val)
{
uint8_t buf[4];
LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
trace_cpu_out(addr, val);
trace_cpu_out(addr, 'l', val);
stl_p(buf, val);
address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
buf, 4);
@ -96,8 +85,7 @@ uint8_t cpu_inb(pio_addr_t addr)
address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
&val, 1);
trace_cpu_in(addr, val);
LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
trace_cpu_in(addr, 'b', val);
return val;
}
@ -108,8 +96,7 @@ uint16_t cpu_inw(pio_addr_t addr)
address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2);
val = lduw_p(buf);
trace_cpu_in(addr, val);
LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
trace_cpu_in(addr, 'w', val);
return val;
}
@ -120,8 +107,7 @@ uint32_t cpu_inl(pio_addr_t addr)
address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4);
val = ldl_p(buf);
trace_cpu_in(addr, val);
LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
trace_cpu_in(addr, 'l', val);
return val;
}