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target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg

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henvcfg.PBMTE/STCE are read-only zero if menvcfg.PBMTE/STCE are zero.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20230224040852.37109-3-liweiwei@iscas.ac.cn>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Weiwei Li 2023-02-24 12:08:48 +08:00 • committed by Palmer Dabbelt
parent 73ec0ead67
commit 6f3eb1a3c8
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GPG key ID: 2E1319F35FBB1889
1 changed files with 9 additions and 4 deletions
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13
target/riscv/csr.c
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@ -1956,7 +1956,11 @@ static RISCVException read_henvcfg(CPURISCVState *env, int csrno,
return ret; return ret;
} }
*val = env->henvcfg; /*
* henvcfg.pbmte is read_only 0 when menvcfg.pbmte = 0
* henvcfg.stce is read_only 0 when menvcfg.stce = 0
*/
*val = env->henvcfg & (~(HENVCFG_PBMTE | HENVCFG_STCE) | env->menvcfg);
return RISCV_EXCP_NONE; return RISCV_EXCP_NONE;
} }
@ -1972,7 +1976,7 @@ static RISCVException write_henvcfg(CPURISCVState *env, int csrno,
} }
if (riscv_cpu_mxl(env) == MXL_RV64) { if (riscv_cpu_mxl(env) == MXL_RV64) {
mask |= HENVCFG_PBMTE | HENVCFG_STCE; mask |= env->menvcfg & (HENVCFG_PBMTE | HENVCFG_STCE);
} }
env->henvcfg = (env->henvcfg & ~mask) | (val & mask); env->henvcfg = (env->henvcfg & ~mask) | (val & mask);
@ -1990,14 +1994,15 @@ static RISCVException read_henvcfgh(CPURISCVState *env, int csrno,
return ret; return ret;
} }
*val = env->henvcfg >> 32; *val = (env->henvcfg & (~(HENVCFG_PBMTE | HENVCFG_STCE) |
env->menvcfg)) >> 32;
return RISCV_EXCP_NONE; return RISCV_EXCP_NONE;
} }
static RISCVException write_henvcfgh(CPURISCVState *env, int csrno, static RISCVException write_henvcfgh(CPURISCVState *env, int csrno,
target_ulong val) target_ulong val)
{ {
uint64_t mask = HENVCFG_PBMTE | HENVCFG_STCE; uint64_t mask = env->menvcfg & (HENVCFG_PBMTE | HENVCFG_STCE);
uint64_t valh = (uint64_t)val << 32; uint64_t valh = (uint64_t)val << 32;
RISCVException ret; RISCVException ret;