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target/riscv: Add the checking into stimecmp write function.
Preparation commit to let aclint timer to use stimecmp write function. Aclint timer doesn't call sstc() predicate so we need to check inside the stimecmp write function. Signed-off-by: Jim Shu <jim.shu@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250519143518.11086-2-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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c77283dd5d
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1 changed files with 17 additions and 2 deletions
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@ -46,8 +46,23 @@ void riscv_timer_write_timecmp(CPURISCVState *env, QEMUTimer *timer,
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{
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{
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uint64_t diff, ns_diff, next;
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uint64_t diff, ns_diff, next;
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RISCVAclintMTimerState *mtimer = env->rdtime_fn_arg;
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RISCVAclintMTimerState *mtimer = env->rdtime_fn_arg;
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uint32_t timebase_freq = mtimer->timebase_freq;
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uint32_t timebase_freq;
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uint64_t rtc_r = env->rdtime_fn(env->rdtime_fn_arg) + delta;
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uint64_t rtc_r;
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if (!riscv_cpu_cfg(env)->ext_sstc || !env->rdtime_fn ||
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!env->rdtime_fn_arg || !get_field(env->menvcfg, MENVCFG_STCE)) {
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/* S/VS Timer IRQ depends on sstc extension, rdtime_fn(), and STCE. */
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return;
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}
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if (timer_irq == MIP_VSTIP &&
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(!riscv_has_ext(env, RVH) || !get_field(env->henvcfg, HENVCFG_STCE))) {
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/* VS Timer IRQ also depends on RVH and henvcfg.STCE. */
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return;
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}
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timebase_freq = mtimer->timebase_freq;
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rtc_r = env->rdtime_fn(env->rdtime_fn_arg) + delta;
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if (timecmp <= rtc_r) {
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if (timecmp <= rtc_r) {
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/*
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/*
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