mirror of
https://github.com/Motorhead1991/qemu.git
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MIPS FPU support (Marius Goeger)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
180b700dc7
commit
6ea83fedc8
9 changed files with 1364 additions and 23 deletions
485
target-mips/op.c
485
target-mips/op.c
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@ -2,6 +2,7 @@
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* MIPS emulation micro-operations for qemu.
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*
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* Copyright (c) 2004-2005 Jocelyn Mayer
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* Copyright (c) 2006 Marius Groeger (FPU operations)
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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@ -149,6 +150,143 @@ CALL_FROM_TB2(func, arg0, arg1);
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#include "op_template.c"
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#undef TN
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#ifdef MIPS_USES_FPU
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#define SFREG 0
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#define DFREG 0
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 1
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 2
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#define DFREG 2
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 3
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 4
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#define DFREG 4
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 5
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 6
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#define DFREG 6
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 7
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 8
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#define DFREG 8
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 9
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 10
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#define DFREG 10
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 11
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 12
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#define DFREG 12
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 13
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 14
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#define DFREG 14
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 15
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 16
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#define DFREG 16
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 17
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 18
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#define DFREG 18
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 19
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 20
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#define DFREG 20
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 21
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 22
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#define DFREG 22
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 23
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 24
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#define DFREG 24
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 25
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 26
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#define DFREG 26
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 27
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 28
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#define DFREG 28
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 29
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#include "fop_template.c"
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#undef SFREG
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#define SFREG 30
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#define DFREG 30
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#include "fop_template.c"
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#undef SFREG
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#undef DFREG
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#define SFREG 31
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#include "fop_template.c"
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#undef SFREG
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#define FTN
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#include "fop_template.c"
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#undef FTN
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#endif
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void op_dup_T0 (void)
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{
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T2 = T0;
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@ -562,6 +700,353 @@ void op_mtc0 (void)
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RETURN();
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}
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#ifdef MIPS_USES_FPU
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#if 0
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# define DEBUG_FPU_STATE() CALL_FROM_TB1(dump_fpu, env)
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#else
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# define DEBUG_FPU_STATE() do { } while(0)
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#endif
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void op_cp1_enabled(void)
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{
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if (!(env->CP0_Status & (1 << CP0St_CU1))) {
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CALL_FROM_TB2(do_raise_exception_err, EXCP_CpU, 1);
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}
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RETURN();
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}
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/* CP1 functions */
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void op_cfc1 (void)
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{
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if (T1 == 0) {
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T0 = env->fcr0;
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}
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else {
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/* fetch fcr31, masking unused bits */
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T0 = env->fcr31 & 0x0183FFFF;
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}
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DEBUG_FPU_STATE();
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RETURN();
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}
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/* convert MIPS rounding mode in FCR31 to IEEE library */
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unsigned int ieee_rm[] = {
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float_round_nearest_even,
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float_round_to_zero,
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float_round_up,
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float_round_down
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};
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#define RESTORE_ROUNDING_MODE \
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set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
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void op_ctc1 (void)
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{
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if (T1 == 0) {
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/* XXX should this throw an exception?
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* don't write to FCR0.
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* env->fcr0 = T0;
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*/
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}
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else {
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/* store new fcr31, masking unused bits */
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env->fcr31 = T0 & 0x0183FFFF;
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/* set rounding mode */
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RESTORE_ROUNDING_MODE;
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#ifndef CONFIG_SOFTFLOAT
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/* no floating point exception for native float */
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SET_FP_ENABLE(env->fcr31, 0);
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#endif
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}
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DEBUG_FPU_STATE();
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RETURN();
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}
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void op_mfc1 (void)
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{
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T0 = WT0;
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DEBUG_FPU_STATE();
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RETURN();
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}
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void op_mtc1 (void)
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{
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WT0 = T0;
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DEBUG_FPU_STATE();
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RETURN();
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}
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/* Float support.
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Single precition routines have a "s" suffix, double precision a
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"d" suffix. */
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#define FLOAT_OP(name, p) void OPPROTO op_float_##name##_##p(void)
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FLOAT_OP(cvtd, w)
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{
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FDT2 = int32_to_float64(WT0, &env->fp_status);
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(cvts, w)
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{
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FST2 = int32_to_float32(WT0, &env->fp_status);
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(cvtw, s)
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{
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WT2 = float32_to_int32(FST0, &env->fp_status);
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(cvtw, d)
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{
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WT2 = float64_to_int32(FDT0, &env->fp_status);
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(roundw, d)
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{
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set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
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WT2 = float64_round_to_int(FDT0, &env->fp_status);
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RESTORE_ROUNDING_MODE;
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(roundw, s)
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{
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set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
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WT2 = float32_round_to_int(FST0, &env->fp_status);
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RESTORE_ROUNDING_MODE;
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(truncw, d)
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{
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WT2 = float64_to_int32_round_to_zero(FDT0, &env->fp_status);
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(truncw, s)
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{
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WT2 = float32_to_int32_round_to_zero(FST0, &env->fp_status);
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(ceilw, d)
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{
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set_float_rounding_mode(float_round_up, &env->fp_status);
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WT2 = float64_round_to_int(FDT0, &env->fp_status);
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RESTORE_ROUNDING_MODE;
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(ceilw, s)
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{
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set_float_rounding_mode(float_round_up, &env->fp_status);
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WT2 = float32_round_to_int(FST0, &env->fp_status);
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RESTORE_ROUNDING_MODE;
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(floorw, d)
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{
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set_float_rounding_mode(float_round_down, &env->fp_status);
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WT2 = float64_round_to_int(FDT0, &env->fp_status);
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RESTORE_ROUNDING_MODE;
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(floorw, s)
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{
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set_float_rounding_mode(float_round_down, &env->fp_status);
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WT2 = float32_round_to_int(FST0, &env->fp_status);
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RESTORE_ROUNDING_MODE;
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DEBUG_FPU_STATE();
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RETURN();
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}
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/* binary operations */
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#define FLOAT_BINOP(name) \
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FLOAT_OP(name, d) \
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{ \
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FDT2 = float64_ ## name (FDT0, FDT1, &env->fp_status); \
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DEBUG_FPU_STATE(); \
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} \
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FLOAT_OP(name, s) \
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{ \
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FST2 = float32_ ## name (FST0, FST1, &env->fp_status); \
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DEBUG_FPU_STATE(); \
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}
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FLOAT_BINOP(add)
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FLOAT_BINOP(sub)
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FLOAT_BINOP(mul)
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FLOAT_BINOP(div)
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#undef FLOAT_BINOP
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/* unary operations, modifying fp status */
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#define FLOAT_UNOP(name) \
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FLOAT_OP(name, d) \
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{ \
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FDT2 = float64_ ## name(FDT0, &env->fp_status); \
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DEBUG_FPU_STATE(); \
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} \
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FLOAT_OP(name, s) \
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{ \
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FST2 = float32_ ## name(FST0, &env->fp_status); \
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DEBUG_FPU_STATE(); \
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}
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FLOAT_UNOP(sqrt)
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#undef FLOAT_UNOP
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/* unary operations, not modifying fp status */
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#define FLOAT_UNOP(name) \
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FLOAT_OP(name, d) \
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{ \
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FDT2 = float64_ ## name(FDT0); \
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DEBUG_FPU_STATE(); \
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} \
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FLOAT_OP(name, s) \
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{ \
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FST2 = float32_ ## name(FST0); \
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DEBUG_FPU_STATE(); \
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}
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FLOAT_UNOP(abs)
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FLOAT_UNOP(chs)
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#undef FLOAT_UNOP
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FLOAT_OP(mov, d)
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{
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FDT2 = FDT0;
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DEBUG_FPU_STATE();
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RETURN();
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}
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FLOAT_OP(mov, s)
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{
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FST2 = FST0;
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DEBUG_FPU_STATE();
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RETURN();
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}
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#ifdef CONFIG_SOFTFLOAT
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#define clear_invalid() do { \
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int flags = get_float_exception_flags(&env->fp_status); \
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flags &= ~float_flag_invalid; \
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set_float_exception_flags(flags, &env->fp_status); \
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} while(0)
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#else
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#define clear_invalid() do { } while(0)
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#endif
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extern void dump_fpu_s(CPUState *env);
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#define FOP_COND(fmt, op, sig, cond) \
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void op_cmp_ ## fmt ## _ ## op (void) \
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{ \
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if (cond) \
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SET_FP_COND(env->fcr31); \
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else \
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CLEAR_FP_COND(env->fcr31); \
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if (!sig) \
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clear_invalid(); \
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/*CALL_FROM_TB1(dump_fpu_s, env);*/ \
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DEBUG_FPU_STATE(); \
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RETURN(); \
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}
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flag float64_is_unordered(float64 a, float64 b STATUS_PARAM)
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{
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extern flag float64_is_nan( float64 a );
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if (float64_is_nan(a) || float64_is_nan(b)) {
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float_raise(float_flag_invalid, status);
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return 1;
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}
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else {
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return 0;
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}
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}
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FOP_COND(d, f, 0, 0)
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FOP_COND(d, un, 0, float64_is_unordered(FDT1, FDT0, &env->fp_status))
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FOP_COND(d, eq, 0, float64_eq(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, ueq, 0, float64_is_unordered(FDT1, FDT0, &env->fp_status) || float64_eq(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, olt, 0, float64_lt(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, ult, 0, float64_is_unordered(FDT1, FDT0, &env->fp_status) || float64_lt(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, ole, 0, float64_le(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, ule, 0, float64_is_unordered(FDT1, FDT0, &env->fp_status) || float64_le(FDT0, FDT1, &env->fp_status))
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/* NOTE: the comma operator will make "cond" to eval to false,
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* but float*_is_unordered() is still called
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*/
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FOP_COND(d, sf, 1, (float64_is_unordered(FDT0, FDT1, &env->fp_status), 0))
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FOP_COND(d, ngle,1, float64_is_unordered(FDT1, FDT0, &env->fp_status))
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FOP_COND(d, seq, 1, float64_eq(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, ngl, 1, float64_is_unordered(FDT1, FDT0, &env->fp_status) || float64_eq(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, lt, 1, float64_lt(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, nge, 1, float64_is_unordered(FDT1, FDT0, &env->fp_status) || float64_lt(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, le, 1, float64_le(FDT0, FDT1, &env->fp_status))
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FOP_COND(d, ngt, 1, float64_is_unordered(FDT1, FDT0, &env->fp_status) || float64_le(FDT0, FDT1, &env->fp_status))
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flag float32_is_unordered(float32 a, float32 b STATUS_PARAM)
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{
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extern flag float32_is_nan( float32 a );
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if (float32_is_nan(a) || float32_is_nan(b)) {
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float_raise(float_flag_invalid, status);
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return 1;
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}
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else {
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return 0;
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}
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}
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/* NOTE: the comma operator will make "cond" to eval to false,
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* but float*_is_unordered() is still called
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*/
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FOP_COND(s, f, 0, 0)
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FOP_COND(s, un, 0, float32_is_unordered(FST1, FST0, &env->fp_status))
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FOP_COND(s, eq, 0, float32_eq(FST0, FST1, &env->fp_status))
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||||
FOP_COND(s, ueq, 0, float32_is_unordered(FST1, FST0, &env->fp_status) || float32_eq(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, olt, 0, float32_lt(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, ult, 0, float32_is_unordered(FST1, FST0, &env->fp_status) || float32_lt(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, ole, 0, float32_le(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, ule, 0, float32_is_unordered(FST1, FST0, &env->fp_status) || float32_le(FST0, FST1, &env->fp_status))
|
||||
/* NOTE: the comma operator will make "cond" to eval to false,
|
||||
* but float*_is_unordered() is still called
|
||||
*/
|
||||
FOP_COND(s, sf, 1, (float32_is_unordered(FST0, FST1, &env->fp_status), 0))
|
||||
FOP_COND(s, ngle,1, float32_is_unordered(FST1, FST0, &env->fp_status))
|
||||
FOP_COND(s, seq, 1, float32_eq(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, ngl, 1, float32_is_unordered(FST1, FST0, &env->fp_status) || float32_eq(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, lt, 1, float32_lt(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, nge, 1, float32_is_unordered(FST1, FST0, &env->fp_status) || float32_lt(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, le, 1, float32_le(FST0, FST1, &env->fp_status))
|
||||
FOP_COND(s, ngt, 1, float32_is_unordered(FST1, FST0, &env->fp_status) || float32_le(FST0, FST1, &env->fp_status))
|
||||
|
||||
void op_bc1f (void)
|
||||
{
|
||||
T0 = ! IS_FP_COND_SET(env->fcr31);
|
||||
DEBUG_FPU_STATE();
|
||||
RETURN();
|
||||
}
|
||||
|
||||
void op_bc1t (void)
|
||||
{
|
||||
T0 = IS_FP_COND_SET(env->fcr31);
|
||||
DEBUG_FPU_STATE();
|
||||
RETURN();
|
||||
}
|
||||
#endif /* MIPS_USES_FPU */
|
||||
|
||||
#if defined(MIPS_USES_R4K_TLB)
|
||||
void op_tlbwi (void)
|
||||
{
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue