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Capstone disassembler
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJZ8bGHAAoJEGTfOOivfiFfOXQH/jc3BbQ+ulxvQSgA3rI2JE1e Ww5FK5HEs4qZU3hz4EtE2Cd5p7qV5I4tWRtbxzc6BGBwLsfz3a60Abx7726sZiH0 ZuULTsWXQ/71XfZHQysgOSoy36G8xj/1yvrMWHjDCfWp/pzz479YXWSSn2TWEHpI jI6nKP5ALdv5XTAaglGaNzqVeWgjKXJn4O8qZFS7axj7hndzLFguymfm8rV8DAdd LRuYWOizzzJ0dcaO/HHyLTzSl7rR0g+DmcOAuFCREy4f+r6tXijwiirB5f7ZJiqc hgEBq/6NfztW2+pAUSxqI2Kuq1zVETTpZORH1+UxvVk9GPu1ouYldMx0NrYhDtc= =fC5W -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging Capstone disassembler # gpg: Signature made Thu 26 Oct 2017 10:57:27 BST # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-dis-20171026: disas: Add capstone as submodule disas: Remove monitor_disas_is_physical ppc: Support Capstone in disas_set_info arm: Support Capstone in disas_set_info i386: Support Capstone in disas_set_info disas: Support the Capstone disassembler library disas: Remove unused flags arguments target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY target/arm: Move BE32 disassembler fixup target/ppc: Convert to disas_set_info hook target/i386: Convert to disas_set_info hook Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # target/i386/cpu.c # target/ppc/translate_init.c
This commit is contained in:
commit
6e6430a821
33 changed files with 468 additions and 185 deletions
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@ -33,6 +33,7 @@
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#include "sysemu/sysemu.h"
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#include "sysemu/hw_accel.h"
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#include "kvm_arm.h"
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#include "disas/capstone.h"
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static void arm_cpu_set_pc(CPUState *cs, vaddr value)
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{
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@ -473,25 +474,11 @@ print_insn_thumb1(bfd_vma pc, disassemble_info *info)
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return print_insn_arm(pc | 1, info);
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}
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static int arm_read_memory_func(bfd_vma memaddr, bfd_byte *b,
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int length, struct disassemble_info *info)
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{
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assert(info->read_memory_inner_func);
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assert((info->flags & INSN_ARM_BE32) == 0 || length == 2 || length == 4);
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if ((info->flags & INSN_ARM_BE32) != 0 && length == 2) {
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assert(info->endian == BFD_ENDIAN_LITTLE);
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return info->read_memory_inner_func(memaddr ^ 2, (bfd_byte *)b, 2,
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info);
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} else {
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return info->read_memory_inner_func(memaddr, b, length, info);
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}
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}
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static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
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{
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ARMCPU *ac = ARM_CPU(cpu);
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CPUARMState *env = &ac->env;
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bool sctlr_b;
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if (is_a64(env)) {
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/* We might not be compiled with the A64 disassembler
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@ -501,26 +488,40 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
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#if defined(CONFIG_ARM_A64_DIS)
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info->print_insn = print_insn_arm_a64;
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#endif
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} else if (env->thumb) {
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info->print_insn = print_insn_thumb1;
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info->cap_arch = CS_ARCH_ARM64;
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} else {
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info->print_insn = print_insn_arm;
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int cap_mode;
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if (env->thumb) {
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info->print_insn = print_insn_thumb1;
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cap_mode = CS_MODE_THUMB;
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} else {
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info->print_insn = print_insn_arm;
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cap_mode = CS_MODE_ARM;
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}
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if (arm_feature(env, ARM_FEATURE_V8)) {
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cap_mode |= CS_MODE_V8;
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}
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if (arm_feature(env, ARM_FEATURE_M)) {
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cap_mode |= CS_MODE_MCLASS;
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}
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info->cap_arch = CS_ARCH_ARM;
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info->cap_mode = cap_mode;
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}
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if (bswap_code(arm_sctlr_b(env))) {
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sctlr_b = arm_sctlr_b(env);
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if (bswap_code(sctlr_b)) {
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#ifdef TARGET_WORDS_BIGENDIAN
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info->endian = BFD_ENDIAN_LITTLE;
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#else
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info->endian = BFD_ENDIAN_BIG;
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#endif
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}
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if (info->read_memory_inner_func == NULL) {
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info->read_memory_inner_func = info->read_memory_func;
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info->read_memory_func = arm_read_memory_func;
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}
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info->flags &= ~INSN_ARM_BE32;
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if (arm_sctlr_b(env)) {
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#ifndef CONFIG_USER_ONLY
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if (sctlr_b) {
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info->flags |= INSN_ARM_BE32;
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}
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#endif
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}
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uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)
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@ -11423,8 +11423,7 @@ static void aarch64_tr_disas_log(const DisasContextBase *dcbase,
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first));
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log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size,
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4 | (bswap_code(dc->sctlr_b) ? 2 : 0));
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log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size);
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}
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const TranslatorOps aarch64_translator_ops = {
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@ -12372,8 +12372,7 @@ static void arm_tr_disas_log(const DisasContextBase *dcbase, CPUState *cpu)
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first));
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log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size,
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dc->thumb | (dc->sctlr_b << 1));
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log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size);
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}
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static const TranslatorOps arm_translator_ops = {
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