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target/arm: Convert Saturating addition and subtraction

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Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-09-04 12:29:58 -07:00 • committed by Peter Maydell
parent 2409d56454
commit 6d0730a824
3 changed files with 67 additions and 27 deletions
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10
target/arm/a32.decode
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@ -27,6 +27,7 @@
&s_rri_rot s rn rd imm rot
&s_rrrr s rd rn rm ra
&rrrr rd rn rm ra
&rrr rd rn rm
# Data-processing (register)
@ -122,3 +123,12 @@ UMULL .... 0000 100 . .... .... .... 1001 .... @s_rdamn
UMLAL .... 0000 101 . .... .... .... 1001 .... @s_rdamn
SMULL .... 0000 110 . .... .... .... 1001 .... @s_rdamn
SMLAL .... 0000 111 . .... .... .... 1001 .... @s_rdamn
# Saturating addition and subtraction
@rndm ---- .... .... rn:4 rd:4 .... .... rm:4 &rrr
QADD .... 0001 0000 .... .... 0000 0101 .... @rndm
QSUB .... 0001 0010 .... .... 0000 0101 .... @rndm
QDADD .... 0001 0100 .... .... 0000 0101 .... @rndm
QDSUB .... 0001 0110 .... .... 0000 0101 .... @rndm