motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-05 16:53:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/riscv: configure and turn on vector extension from command line

Browse source 
Vector extension is default off. The only way to use vector extension is
1. use cpu rv32 or rv64
2. turn on it by command line
   "-cpu rv64,x-v=true,vlen=128,elen=64,vext_spec=v0.7.1".

vlen is the vector register length, default value is 128 bit.
elen is the max operator size in bits, default value is 64 bit.
vext_spec is the vector specification version, default value is v0.7.1.
These properties can be specified with other values.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200701152549.1218-62-zhiwei_liu@c-sky.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
LIU Zhiwei 2020-07-01 23:25:49 +08:00 • committed by Alistair Francis
parent 31bf42a26c
commit 6bf91617f4
2 changed files with 46 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

4
target/riscv/cpu.h
View file

@ -92,7 +92,7 @@ typedef struct CPURISCVState CPURISCVState;
#include "pmp.h"
#define RV_VLEN_MAX 512
#define RV_VLEN_MAX 256
FIELD(VTYPE, VLMUL, 0, 2)
FIELD(VTYPE, VSEW, 2, 3)
@ -279,12 +279,14 @@ typedef struct RISCVCPU {
bool ext_s;
bool ext_u;
bool ext_h;
bool ext_v;
bool ext_counters;
bool ext_ifencei;
bool ext_icsr;
char *priv_spec;
char *user_spec;
char *vext_spec;
uint16_t vlen;
uint16_t elen;
bool mmu;