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hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode

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This patch implements the FIFO mode of the SMBus module. In FIFO, the
user transmits or receives at most 16 bytes at a time. The FIFO mode
allows the module to transmit large amount of data faster than single
byte mode.

Since we only added the device in a patch that is only a few commits
away in the same patch set. We do not increase the VMstate version
number in this special case.

Reviewed-by: Doug Evans<dje@google.com>
Reviewed-by: Tyrong Ting<kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Reviewed-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20210210220426.3577804-6-wuhaotsh@google.com
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Hao Wu 2021-02-10 14:04:26 -08:00 • committed by Peter Maydell
parent d986bf729c
commit 6b6e7570d6
4 changed files with 501 additions and 16 deletions
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25
include/hw/i2c/npcm7xx_smbus.h
View file

@ -27,6 +27,9 @@
*/
#define NPCM7XX_SMBUS_NR_ADDRS 10
/* Size of the FIFO buffer. */
#define NPCM7XX_SMBUS_FIFO_SIZE 16
typedef enum NPCM7xxSMBusStatus {
NPCM7XX_SMBUS_STATUS_IDLE,
NPCM7XX_SMBUS_STATUS_SENDING,
@ -53,6 +56,16 @@ typedef enum NPCM7xxSMBusStatus {
* @addr: The SMBus module's own addresses on the I2C bus.
* @scllt: The SCL low time register.
* @sclht: The SCL high time register.
* @fif_ctl: The FIFO control register.
* @fif_cts: The FIFO control status register.
* @fair_per: The fair preriod register.
* @txf_ctl: The transmit FIFO control register.
* @t_out: The SMBus timeout register.
* @txf_sts: The transmit FIFO status register.
* @rxf_sts: The receive FIFO status register.
* @rxf_ctl: The receive FIFO control register.
* @rx_fifo: The FIFO buffer for receiving in FIFO mode.
* @rx_cur: The current position of rx_fifo.
* @status: The current status of the SMBus.
*/
typedef struct NPCM7xxSMBusState {
@ -78,6 +91,18 @@ typedef struct NPCM7xxSMBusState {
uint8_t scllt;
uint8_t sclht;
uint8_t fif_ctl;
uint8_t fif_cts;
uint8_t fair_per;
uint8_t txf_ctl;
uint8_t t_out;
uint8_t txf_sts;
uint8_t rxf_sts;
uint8_t rxf_ctl;
uint8_t rx_fifo[NPCM7XX_SMBUS_FIFO_SIZE];
uint8_t rx_cur;
NPCM7xxSMBusStatus status;
} NPCM7xxSMBusState;