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target-alpha: switch a few helpers to TCG

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Switch a few helpers to TCG and implement RC and RS instructions

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-09-18 00:02:17 +00:00
parent b3249f630e
commit 6ad025921c
6 changed files with 41 additions and 67 deletions
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22
target-alpha/translate.c
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@ -250,8 +250,14 @@ static always_inline void _gen_op_bcond (DisasContext *ctx)
static always_inline void gen_excp (DisasContext *ctx,
int exception, int error_code)
{
TCGv tmp1, tmp2;
tcg_gen_movi_i64(cpu_pc, ctx->pc);
gen_op_excp(exception, error_code);
tmp1 = tcg_const_i32(exception);
tmp2 = tcg_const_i32(error_code);
tcg_gen_helper_0_2(helper_excp, tmp1, tmp2);
tcg_temp_free(tmp2);
tcg_temp_free(tmp1);
}
static always_inline void gen_invalid (DisasContext *ctx)
@ -1176,9 +1182,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
break;
case 0x6C:
/* IMPLVER */
gen_op_load_implver();
if (rc != 31)
tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]);
tcg_gen_helper_1_0(helper_load_implver, cpu_ir[rc]);
break;
default:
goto invalid_opc;
@ -1699,16 +1704,13 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
break;
case 0xC000:
/* RPCC */
gen_op_load_pcc();
if (ra != 31)
tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]);
tcg_gen_helper_1_0(helper_load_pcc, cpu_ir[ra]);
break;
case 0xE000:
/* RC */
gen_op_load_irf();
if (ra != 31)
tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]);
gen_op_clear_irf();
tcg_gen_helper_1_0(helper_rc, cpu_ir[ra]);
break;
case 0xE800:
/* ECB */
@ -1721,10 +1723,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
break;
case 0xF000:
/* RS */
gen_op_load_irf();
if (ra != 31)
tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]);
gen_op_set_irf();
tcg_gen_helper_1_0(helper_rs, cpu_ir[ra]);
break;
case 0xF800:
/* WH64 */