hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format

Update the SPCR table to accommodate the SPCR Table revision 4 [1].
The SPCR table has been modified to adhere to the revision 4 format [2].

[1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table
[2]: https://github.com/acpica/acpica/pull/931

Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-ID: <20241028015744.624943-3-jeeheng.sia@starfivetech.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Sia Jee Heng 2024-10-27 18:57:43 -07:00 committed by Alistair Francis
parent a205d0bcc8
commit 6ab861421c
6 changed files with 42 additions and 13 deletions

View file

@ -2078,7 +2078,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
void build_spcr(GArray *table_data, BIOSLinker *linker, void build_spcr(GArray *table_data, BIOSLinker *linker,
const AcpiSpcrData *f, const uint8_t rev, const AcpiSpcrData *f, const uint8_t rev,
const char *oem_id, const char *oem_table_id) const char *oem_id, const char *oem_table_id, const char *name)
{ {
AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id, AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
.oem_table_id = oem_table_id }; .oem_table_id = oem_table_id };
@ -2124,9 +2124,21 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
build_append_int_noprefix(table_data, f->pci_flags, 4); build_append_int_noprefix(table_data, f->pci_flags, 4);
/* PCI Segment */ /* PCI Segment */
build_append_int_noprefix(table_data, f->pci_segment, 1); build_append_int_noprefix(table_data, f->pci_segment, 1);
if (rev < 4) {
/* Reserved */ /* Reserved */
build_append_int_noprefix(table_data, 0, 4); build_append_int_noprefix(table_data, 0, 4);
} else {
/* UartClkFreq */
build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
/* PreciseBaudrate */
build_append_int_noprefix(table_data, f->precise_baudrate, 4);
/* NameSpaceStringLength */
build_append_int_noprefix(table_data, f->namespace_string_length, 2);
/* NameSpaceStringOffset */
build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
/* NamespaceString[] */
g_array_append_vals(table_data, name, f->namespace_string_length);
}
acpi_table_end(linker, &table); acpi_table_end(linker, &table);
} }
/* /*

View file

@ -463,8 +463,12 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
.pci_flags = 0, .pci_flags = 0,
.pci_segment = 0, .pci_segment = 0,
}; };
/*
build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id); * Passing NULL as the SPCR Table for Revision 2 doesn't support
* NameSpaceString.
*/
build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id,
NULL);
} }
/* /*

View file

@ -276,8 +276,12 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, MachineState *machine)
}; };
lvms = LOONGARCH_VIRT_MACHINE(machine); lvms = LOONGARCH_VIRT_MACHINE(machine);
/*
* Passing NULL as the SPCR Table for Revision 2 doesn't support
* NameSpaceString.
*/
build_spcr(table_data, linker, &serial, 2, lvms->oem_id, build_spcr(table_data, linker, &serial, 2, lvms->oem_id,
lvms->oem_table_id); lvms->oem_table_id, NULL);
} }
typedef typedef

View file

@ -200,14 +200,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
/* /*
* Serial Port Console Redirection Table (SPCR) * Serial Port Console Redirection Table (SPCR)
* Rev: 1.07 * Rev: 1.10
*/ */
static void static void
spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s) spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
{ {
const char name[] = ".";
AcpiSpcrData serial = { AcpiSpcrData serial = {
.interface_type = 0, /* 16550 compatible */ .interface_type = 0x12, /* 16550 compatible */
.base_addr.id = AML_AS_SYSTEM_MEMORY, .base_addr.id = AML_AS_SYSTEM_MEMORY,
.base_addr.width = 32, .base_addr.width = 32,
.base_addr.offset = 0, .base_addr.offset = 0,
@ -229,9 +230,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
.pci_function = 0, .pci_function = 0,
.pci_flags = 0, .pci_flags = 0,
.pci_segment = 0, .pci_segment = 0,
.uart_clk_freq = 0,
.precise_baudrate = 0,
.namespace_string_length = sizeof(name),
.namespace_string_offset = 88,
}; };
build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id); build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
name);
} }
/* RHCT Node[N] starts at offset 56 */ /* RHCT Node[N] starts at offset 56 */

View file

@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
uint8_t flow_control; uint8_t flow_control;
uint8_t terminal_type; uint8_t terminal_type;
uint8_t language; uint8_t language;
uint8_t reserved1;
uint16_t pci_device_id; /* Must be 0xffff if not PCI device */ uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */ uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
uint8_t pci_bus; uint8_t pci_bus;
@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
uint8_t pci_function; uint8_t pci_function;
uint32_t pci_flags; uint32_t pci_flags;
uint8_t pci_segment; uint8_t pci_segment;
uint32_t reserved2; uint32_t uart_clk_freq;
uint32_t precise_baudrate;
uint32_t namespace_string_length;
uint32_t namespace_string_offset;
char namespace_string[];
} AcpiSpcrData; } AcpiSpcrData;
#define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0) #define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)

View file

@ -507,5 +507,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
void build_spcr(GArray *table_data, BIOSLinker *linker, void build_spcr(GArray *table_data, BIOSLinker *linker,
const AcpiSpcrData *f, const uint8_t rev, const AcpiSpcrData *f, const uint8_t rev,
const char *oem_id, const char *oem_table_id); const char *oem_id, const char *oem_table_id, const char *name);
#endif #endif