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hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
Update the SPCR table to accommodate the SPCR Table revision 4 [1]. The SPCR table has been modified to adhere to the revision 4 format [2]. [1]: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table [2]: https://github.com/acpica/acpica/pull/931 Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-ID: <20241028015744.624943-3-jeeheng.sia@starfivetech.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
a205d0bcc8
commit
6ab861421c
6 changed files with 42 additions and 13 deletions
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@ -2078,7 +2078,7 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
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void build_spcr(GArray *table_data, BIOSLinker *linker,
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void build_spcr(GArray *table_data, BIOSLinker *linker,
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const AcpiSpcrData *f, const uint8_t rev,
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const AcpiSpcrData *f, const uint8_t rev,
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const char *oem_id, const char *oem_table_id)
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const char *oem_id, const char *oem_table_id, const char *name)
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{
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{
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AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
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AcpiTable table = { .sig = "SPCR", .rev = rev, .oem_id = oem_id,
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.oem_table_id = oem_table_id };
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.oem_table_id = oem_table_id };
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@ -2124,9 +2124,21 @@ void build_spcr(GArray *table_data, BIOSLinker *linker,
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build_append_int_noprefix(table_data, f->pci_flags, 4);
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build_append_int_noprefix(table_data, f->pci_flags, 4);
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/* PCI Segment */
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/* PCI Segment */
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build_append_int_noprefix(table_data, f->pci_segment, 1);
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build_append_int_noprefix(table_data, f->pci_segment, 1);
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if (rev < 4) {
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/* Reserved */
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/* Reserved */
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build_append_int_noprefix(table_data, 0, 4);
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build_append_int_noprefix(table_data, 0, 4);
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} else {
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/* UartClkFreq */
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build_append_int_noprefix(table_data, f->uart_clk_freq, 4);
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/* PreciseBaudrate */
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build_append_int_noprefix(table_data, f->precise_baudrate, 4);
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/* NameSpaceStringLength */
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build_append_int_noprefix(table_data, f->namespace_string_length, 2);
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/* NameSpaceStringOffset */
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build_append_int_noprefix(table_data, f->namespace_string_offset, 2);
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/* NamespaceString[] */
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g_array_append_vals(table_data, name, f->namespace_string_length);
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}
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acpi_table_end(linker, &table);
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acpi_table_end(linker, &table);
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}
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}
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/*
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/*
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@ -463,8 +463,12 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
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.pci_flags = 0,
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.pci_flags = 0,
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.pci_segment = 0,
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.pci_segment = 0,
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};
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};
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/*
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build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id);
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* Passing NULL as the SPCR Table for Revision 2 doesn't support
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* NameSpaceString.
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*/
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build_spcr(table_data, linker, &serial, 2, vms->oem_id, vms->oem_table_id,
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NULL);
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}
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}
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/*
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/*
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@ -276,8 +276,12 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, MachineState *machine)
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};
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};
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lvms = LOONGARCH_VIRT_MACHINE(machine);
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lvms = LOONGARCH_VIRT_MACHINE(machine);
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/*
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* Passing NULL as the SPCR Table for Revision 2 doesn't support
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* NameSpaceString.
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*/
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build_spcr(table_data, linker, &serial, 2, lvms->oem_id,
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build_spcr(table_data, linker, &serial, 2, lvms->oem_id,
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lvms->oem_table_id);
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lvms->oem_table_id, NULL);
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}
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}
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typedef
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typedef
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@ -200,14 +200,15 @@ acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
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/*
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/*
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* Serial Port Console Redirection Table (SPCR)
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* Serial Port Console Redirection Table (SPCR)
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* Rev: 1.07
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* Rev: 1.10
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*/
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*/
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static void
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static void
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spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
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spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
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{
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{
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const char name[] = ".";
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AcpiSpcrData serial = {
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AcpiSpcrData serial = {
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.interface_type = 0, /* 16550 compatible */
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.interface_type = 0x12, /* 16550 compatible */
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.base_addr.id = AML_AS_SYSTEM_MEMORY,
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.base_addr.id = AML_AS_SYSTEM_MEMORY,
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.base_addr.width = 32,
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.base_addr.width = 32,
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.base_addr.offset = 0,
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.base_addr.offset = 0,
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@ -229,9 +230,14 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, RISCVVirtState *s)
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.pci_function = 0,
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.pci_function = 0,
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.pci_flags = 0,
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.pci_flags = 0,
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.pci_segment = 0,
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.pci_segment = 0,
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.uart_clk_freq = 0,
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.precise_baudrate = 0,
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.namespace_string_length = sizeof(name),
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.namespace_string_offset = 88,
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};
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};
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build_spcr(table_data, linker, &serial, 2, s->oem_id, s->oem_table_id);
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build_spcr(table_data, linker, &serial, 4, s->oem_id, s->oem_table_id,
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name);
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}
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}
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/* RHCT Node[N] starts at offset 56 */
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/* RHCT Node[N] starts at offset 56 */
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@ -112,7 +112,6 @@ typedef struct AcpiSpcrData {
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uint8_t flow_control;
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uint8_t flow_control;
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uint8_t terminal_type;
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uint8_t terminal_type;
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uint8_t language;
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uint8_t language;
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uint8_t reserved1;
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uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
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uint16_t pci_device_id; /* Must be 0xffff if not PCI device */
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uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
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uint16_t pci_vendor_id; /* Must be 0xffff if not PCI device */
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uint8_t pci_bus;
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uint8_t pci_bus;
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@ -120,7 +119,11 @@ typedef struct AcpiSpcrData {
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uint8_t pci_function;
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uint8_t pci_function;
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uint32_t pci_flags;
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uint32_t pci_flags;
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uint8_t pci_segment;
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uint8_t pci_segment;
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uint32_t reserved2;
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uint32_t uart_clk_freq;
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uint32_t precise_baudrate;
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uint32_t namespace_string_length;
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uint32_t namespace_string_offset;
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char namespace_string[];
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} AcpiSpcrData;
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} AcpiSpcrData;
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#define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
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#define ACPI_FADT_ARM_PSCI_COMPLIANT (1 << 0)
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@ -507,5 +507,5 @@ void build_tpm2(GArray *table_data, BIOSLinker *linker, GArray *tcpalog,
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void build_spcr(GArray *table_data, BIOSLinker *linker,
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void build_spcr(GArray *table_data, BIOSLinker *linker,
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const AcpiSpcrData *f, const uint8_t rev,
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const AcpiSpcrData *f, const uint8_t rev,
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const char *oem_id, const char *oem_table_id);
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const char *oem_id, const char *oem_table_id, const char *name);
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#endif
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#endif
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