target-ppc: convert SPE load/store to TCG

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5804 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-11-27 19:30:47 +00:00
parent 38d1495201
commit 6a6ae23f3c
5 changed files with 335 additions and 575 deletions

View file

@ -44,16 +44,6 @@ register target_ulong T1 asm(AREG2);
register target_ulong T2 asm(AREG3);
#define TDX "%016lx"
#endif
/* We may, sometime, need 64 bits registers on 32 bits targets */
#if !defined(TARGET_PPC64)
#define T0_64 (env->t0_64)
#define T1_64 (env->t1_64)
#define T2_64 (env->t2_64)
#else
#define T0_64 T0
#define T1_64 T1
#define T2_64 T2
#endif
#define FT0 (env->ft0)
#define FT1 (env->ft1)