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target-microblaze: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPUMBState/g" target-microblaze/*.[hc] sed -i "s/#define CPUMBState/#define CPUState/" target-microblaze/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
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2b3e3cfe84
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68cee38a9c
6 changed files with 57 additions and 57 deletions
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@ -250,7 +250,7 @@ typedef struct CPUMBState {
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#define DRTE_FLAG (1 << 17)
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#define DRTB_FLAG (1 << 18)
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#define D_FLAG (1 << 19) /* Bit in ESR. */
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/* TB dependent CPUState. */
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/* TB dependent CPUMBState. */
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#define IFLAGS_TB_MASK (D_FLAG | IMM_FLAG | DRTI_FLAG | DRTE_FLAG | DRTB_FLAG)
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uint32_t iflags;
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@ -266,10 +266,10 @@ typedef struct CPUMBState {
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CPU_COMMON
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} CPUMBState;
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CPUState *cpu_mb_init(const char *cpu_model);
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int cpu_mb_exec(CPUState *s);
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void cpu_mb_close(CPUState *s);
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void do_interrupt(CPUState *env);
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CPUMBState *cpu_mb_init(const char *cpu_model);
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int cpu_mb_exec(CPUMBState *s);
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void cpu_mb_close(CPUMBState *s);
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void do_interrupt(CPUMBState *env);
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/* you can call this signal handler from your SIGBUS and SIGSEGV
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signal handlers to inform the virtual CPU of exceptions. non zero
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is returned if the signal was handled by the virtual CPU. */
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@ -305,7 +305,7 @@ enum {
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#define MMU_USER_IDX 2
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/* See NB_MMU_MODES further up the file. */
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static inline int cpu_mmu_index (CPUState *env)
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static inline int cpu_mmu_index (CPUMBState *env)
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{
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/* Are we in nommu mode?. */
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if (!(env->sregs[SR_MSR] & MSR_VM))
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@ -316,12 +316,12 @@ static inline int cpu_mmu_index (CPUState *env)
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return MMU_KERNEL_IDX;
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}
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int cpu_mb_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
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int cpu_mb_handle_mmu_fault(CPUMBState *env, target_ulong address, int rw,
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int mmu_idx);
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#define cpu_handle_mmu_fault cpu_mb_handle_mmu_fault
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#if defined(CONFIG_USER_ONLY)
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static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
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static inline void cpu_clone_regs(CPUMBState *env, target_ulong newsp)
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{
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if (newsp)
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env->regs[R_SP] = newsp;
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@ -329,23 +329,23 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp)
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}
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#endif
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static inline void cpu_set_tls(CPUState *env, target_ulong newtls)
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static inline void cpu_set_tls(CPUMBState *env, target_ulong newtls)
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{
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}
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static inline int cpu_interrupts_enabled(CPUState *env)
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static inline int cpu_interrupts_enabled(CPUMBState *env)
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{
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return env->sregs[SR_MSR] & MSR_IE;
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}
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#include "cpu-all.h"
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static inline target_ulong cpu_get_pc(CPUState *env)
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static inline target_ulong cpu_get_pc(CPUMBState *env)
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{
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return env->sregs[SR_PC];
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}
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static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
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static inline void cpu_get_tb_cpu_state(CPUMBState *env, target_ulong *pc,
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target_ulong *cs_base, int *flags)
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{
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*pc = env->sregs[SR_PC];
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@ -355,18 +355,18 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
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}
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#if !defined(CONFIG_USER_ONLY)
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void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr,
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void cpu_unassigned_access(CPUMBState *env1, target_phys_addr_t addr,
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int is_write, int is_exec, int is_asi, int size);
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#endif
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static inline bool cpu_has_work(CPUState *env)
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static inline bool cpu_has_work(CPUMBState *env)
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{
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return env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
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}
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#include "exec-all.h"
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static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
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static inline void cpu_pc_from_tb(CPUMBState *env, TranslationBlock *tb)
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{
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env->sregs[SR_PC] = tb->pc;
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}
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