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update Linux headers to v6.16-rc3

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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2025-06-19 20:09:19 +02:00
parent 41cd354d35
commit 688b0756ad
13 changed files with 177 additions and 73 deletions
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13
include/standard-headers/asm-x86/setup_data.h
View file

@ -13,7 +13,8 @@
#define SETUP_CC_BLOB 7 #define SETUP_CC_BLOB 7
#define SETUP_IMA 8 #define SETUP_IMA 8
#define SETUP_RNG_SEED 9 #define SETUP_RNG_SEED 9
#define SETUP_ENUM_MAX SETUP_RNG_SEED #define SETUP_KEXEC_KHO 10
#define SETUP_ENUM_MAX SETUP_KEXEC_KHO
#define SETUP_INDIRECT (1<<31) #define SETUP_INDIRECT (1<<31)
#define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT) #define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT)
@ -78,6 +79,16 @@ struct ima_setup_data {
uint64_t size; uint64_t size;
} QEMU_PACKED; } QEMU_PACKED;
/*
* Locations of kexec handover metadata
*/
struct kho_data {
uint64_t fdt_addr;
uint64_t fdt_size;
uint64_t scratch_addr;
uint64_t scratch_size;
} QEMU_PACKED;
#endif /* __ASSEMBLER__ */ #endif /* __ASSEMBLER__ */
#endif /* _ASM_X86_SETUP_DATA_H */ #endif /* _ASM_X86_SETUP_DATA_H */

45
include/standard-headers/drm/drm_fourcc.h
View file

@ -421,6 +421,7 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09 #define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a #define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a
#define DRM_FORMAT_MOD_VENDOR_MTK 0x0b #define DRM_FORMAT_MOD_VENDOR_MTK 0x0b
#define DRM_FORMAT_MOD_VENDOR_APPLE 0x0c
/* add more to the end as needed */ /* add more to the end as needed */
@ -1493,6 +1494,50 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
/* alias for the most common tiling format */ /* alias for the most common tiling format */
#define DRM_FORMAT_MOD_MTK_16L_32S_TILE DRM_FORMAT_MOD_MTK(MTK_FMT_MOD_TILE_16L32S) #define DRM_FORMAT_MOD_MTK_16L_32S_TILE DRM_FORMAT_MOD_MTK(MTK_FMT_MOD_TILE_16L32S)
/*
* Apple GPU-tiled layouts.
*
* Apple GPUs support nonlinear tilings with optional lossless compression.
*
* GPU-tiled images are divided into 16KiB tiles:
*
* Bytes per pixel Tile size
* --------------- ---------
* 1 128x128
* 2 128x64
* 4 64x64
* 8 64x32
* 16 32x32
*
* Tiles are raster-order. Pixels within a tile are interleaved (Morton order).
*
* Compressed images pad the body to 128-bytes and are immediately followed by a
* metadata section. The metadata section rounds the image dimensions to
* powers-of-two and contains 8 bytes for each 16x16 compression subtile.
* Subtiles are interleaved (Morton order).
*
* All images are 128-byte aligned.
*
* These layouts fundamentally do not have meaningful strides. No matter how we
* specify strides for these layouts, userspace unaware of Apple image layouts
* will be unable to use correctly the specified stride for any purpose.
* Userspace aware of the image layouts do not use strides. The most "correct"
* convention would be setting the image stride to 0. Unfortunately, some
* software assumes the stride is at least (width * bytes per pixel). We
* therefore require that stride equals (width * bytes per pixel). Since the
* stride is arbitrary here, we pick the simplest convention.
*
* Although containing two sections, compressed image layouts are treated in
* software as a single plane. This is modelled after AFBC, a similar
* scheme. Attempting to separate the sections to be "explicit" in DRM would
* only generate more confusion, as software does not treat the image this way.
*
* For detailed information on the hardware image layouts, see
* https://docs.mesa3d.org/drivers/asahi.html#image-layouts
*/
#define DRM_FORMAT_MOD_APPLE_GPU_TILED fourcc_mod_code(APPLE, 1)
#define DRM_FORMAT_MOD_APPLE_GPU_TILED_COMPRESSED fourcc_mod_code(APPLE, 2)
/* /*
* AMD modifiers * AMD modifiers
* *

124
include/standard-headers/linux/ethtool.h
View file

@ -2295,71 +2295,75 @@ static inline int ethtool_validate_duplex(uint8_t duplex)
#define RXH_XFRM_SYM_OR_XOR (1 << 1) #define RXH_XFRM_SYM_OR_XOR (1 << 1)
#define RXH_XFRM_NO_CHANGE 0xff #define RXH_XFRM_NO_CHANGE 0xff
/* L2-L4 network traffic flow types */ enum {
#define TCP_V4_FLOW 0x01 /* hash or spec (tcp_ip4_spec) */ /* L2-L4 network traffic flow types */
#define UDP_V4_FLOW 0x02 /* hash or spec (udp_ip4_spec) */ TCP_V4_FLOW = 0x01, /* hash or spec (tcp_ip4_spec) */
#define SCTP_V4_FLOW 0x03 /* hash or spec (sctp_ip4_spec) */ UDP_V4_FLOW = 0x02, /* hash or spec (udp_ip4_spec) */
#define AH_ESP_V4_FLOW 0x04 /* hash only */ SCTP_V4_FLOW = 0x03, /* hash or spec (sctp_ip4_spec) */
#define TCP_V6_FLOW 0x05 /* hash or spec (tcp_ip6_spec; nfc only) */ AH_ESP_V4_FLOW = 0x04, /* hash only */
#define UDP_V6_FLOW 0x06 /* hash or spec (udp_ip6_spec; nfc only) */ TCP_V6_FLOW = 0x05, /* hash or spec (tcp_ip6_spec; nfc only) */
#define SCTP_V6_FLOW 0x07 /* hash or spec (sctp_ip6_spec; nfc only) */ UDP_V6_FLOW = 0x06, /* hash or spec (udp_ip6_spec; nfc only) */
#define AH_ESP_V6_FLOW 0x08 /* hash only */ SCTP_V6_FLOW = 0x07, /* hash or spec (sctp_ip6_spec; nfc only) */
#define AH_V4_FLOW 0x09 /* hash or spec (ah_ip4_spec) */ AH_ESP_V6_FLOW = 0x08, /* hash only */
#define ESP_V4_FLOW 0x0a /* hash or spec (esp_ip4_spec) */ AH_V4_FLOW = 0x09, /* hash or spec (ah_ip4_spec) */
#define AH_V6_FLOW 0x0b /* hash or spec (ah_ip6_spec; nfc only) */ ESP_V4_FLOW = 0x0a, /* hash or spec (esp_ip4_spec) */
#define ESP_V6_FLOW 0x0c /* hash or spec (esp_ip6_spec; nfc only) */ AH_V6_FLOW = 0x0b, /* hash or spec (ah_ip6_spec; nfc only) */
#define IPV4_USER_FLOW 0x0d /* spec only (usr_ip4_spec) */ ESP_V6_FLOW = 0x0c, /* hash or spec (esp_ip6_spec; nfc only) */
#define IP_USER_FLOW IPV4_USER_FLOW IPV4_USER_FLOW = 0x0d, /* spec only (usr_ip4_spec) */
#define IPV6_USER_FLOW 0x0e /* spec only (usr_ip6_spec; nfc only) */ IP_USER_FLOW = IPV4_USER_FLOW,
#define IPV4_FLOW 0x10 /* hash only */ IPV6_USER_FLOW = 0x0e, /* spec only (usr_ip6_spec; nfc only) */
#define IPV6_FLOW 0x11 /* hash only */ IPV4_FLOW = 0x10, /* hash only */
#define ETHER_FLOW 0x12 /* spec only (ether_spec) */ IPV6_FLOW = 0x11, /* hash only */
ETHER_FLOW = 0x12, /* spec only (ether_spec) */
/* Used for GTP-U IPv4 and IPv6. /* Used for GTP-U IPv4 and IPv6.
* The format of GTP packets only includes * The format of GTP packets only includes
* elements such as TEID and GTP version. * elements such as TEID and GTP version.
* It is primarily intended for data communication of the UE. * It is primarily intended for data communication of the UE.
*/ */
#define GTPU_V4_FLOW 0x13 /* hash only */ GTPU_V4_FLOW = 0x13, /* hash only */
#define GTPU_V6_FLOW 0x14 /* hash only */ GTPU_V6_FLOW = 0x14, /* hash only */
/* Use for GTP-C IPv4 and v6. /* Use for GTP-C IPv4 and v6.
* The format of these GTP packets does not include TEID. * The format of these GTP packets does not include TEID.
* Primarily expected to be used for communication * Primarily expected to be used for communication
* to create sessions for UE data communication, * to create sessions for UE data communication,
* commonly referred to as CSR (Create Session Request). * commonly referred to as CSR (Create Session Request).
*/ */
#define GTPC_V4_FLOW 0x15 /* hash only */ GTPC_V4_FLOW = 0x15, /* hash only */
#define GTPC_V6_FLOW 0x16 /* hash only */ GTPC_V6_FLOW = 0x16, /* hash only */
/* Use for GTP-C IPv4 and v6. /* Use for GTP-C IPv4 and v6.
* Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID. * Unlike GTPC_V4_FLOW, the format of these GTP packets includes TEID.
* After session creation, it becomes this packet. * After session creation, it becomes this packet.
* This is mainly used for requests to realize UE handover. * This is mainly used for requests to realize UE handover.
*/ */
#define GTPC_TEID_V4_FLOW 0x17 /* hash only */ GTPC_TEID_V4_FLOW = 0x17, /* hash only */
#define GTPC_TEID_V6_FLOW 0x18 /* hash only */ GTPC_TEID_V6_FLOW = 0x18, /* hash only */
/* Use for GTP-U and extended headers for the PSC (PDU Session Container). /* Use for GTP-U and extended headers for the PSC (PDU Session Container).
* The format of these GTP packets includes TEID and QFI. * The format of these GTP packets includes TEID and QFI.
* In 5G communication using UPF (User Plane Function), * In 5G communication using UPF (User Plane Function),
* data communication with this extended header is performed. * data communication with this extended header is performed.
*/ */
#define GTPU_EH_V4_FLOW 0x19 /* hash only */ GTPU_EH_V4_FLOW = 0x19, /* hash only */
#define GTPU_EH_V6_FLOW 0x1a /* hash only */ GTPU_EH_V6_FLOW = 0x1a, /* hash only */
/* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers. /* Use for GTP-U IPv4 and v6 PSC (PDU Session Container) extended headers.
* This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by * This differs from GTPU_EH_V(4|6)_FLOW in that it is distinguished by
* UL/DL included in the PSC. * UL/DL included in the PSC.
* There are differences in the data included based on Downlink/Uplink, * There are differences in the data included based on Downlink/Uplink,
* and can be used to distinguish packets. * and can be used to distinguish packets.
* The functions described so far are useful when you want to * The functions described so far are useful when you want to
* handle communication from the mobile network in UPF, PGW, etc. * handle communication from the mobile network in UPF, PGW, etc.
*/ */
#define GTPU_UL_V4_FLOW 0x1b /* hash only */ GTPU_UL_V4_FLOW = 0x1b, /* hash only */
#define GTPU_UL_V6_FLOW 0x1c /* hash only */ GTPU_UL_V6_FLOW = 0x1c, /* hash only */
#define GTPU_DL_V4_FLOW 0x1d /* hash only */ GTPU_DL_V4_FLOW = 0x1d, /* hash only */
#define GTPU_DL_V6_FLOW 0x1e /* hash only */ GTPU_DL_V6_FLOW = 0x1e, /* hash only */
__FLOW_TYPE_COUNT,
};
/* Flag to enable additional fields in struct ethtool_rx_flow_spec */ /* Flag to enable additional fields in struct ethtool_rx_flow_spec */
#define FLOW_EXT 0x80000000 #define FLOW_EXT 0x80000000

6
include/standard-headers/linux/fuse.h
View file

@ -232,6 +232,9 @@
* *
* 7.43 * 7.43
* - add FUSE_REQUEST_TIMEOUT * - add FUSE_REQUEST_TIMEOUT
*
* 7.44
* - add FUSE_NOTIFY_INC_EPOCH
*/ */
#ifndef _LINUX_FUSE_H #ifndef _LINUX_FUSE_H
@ -263,7 +266,7 @@
#define FUSE_KERNEL_VERSION 7 #define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */ /** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 43 #define FUSE_KERNEL_MINOR_VERSION 44
/** The node ID of the root inode */ /** The node ID of the root inode */
#define FUSE_ROOT_ID 1 #define FUSE_ROOT_ID 1
@ -667,6 +670,7 @@ enum fuse_notify_code {
FUSE_NOTIFY_RETRIEVE = 5, FUSE_NOTIFY_RETRIEVE = 5,
FUSE_NOTIFY_DELETE = 6, FUSE_NOTIFY_DELETE = 6,
FUSE_NOTIFY_RESEND = 7, FUSE_NOTIFY_RESEND = 7,
FUSE_NOTIFY_INC_EPOCH = 8,
FUSE_NOTIFY_CODE_MAX, FUSE_NOTIFY_CODE_MAX,
}; };

3
include/standard-headers/linux/input-event-codes.h
View file

@ -925,7 +925,8 @@
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */ #define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */ #define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MACHINE_COVER 0x10 /* set = cover closed */ #define SW_MACHINE_COVER 0x10 /* set = cover closed */
#define SW_MAX_ 0x10 #define SW_USB_INSERT 0x11 /* set = USB audio device connected */
#define SW_MAX_ 0x11
#define SW_CNT (SW_MAX_+1) #define SW_CNT (SW_MAX_+1)
/* /*

12
include/standard-headers/linux/pci_regs.h
View file

@ -750,7 +750,8 @@
#define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */ #define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */
#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */ #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */ #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE #define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_64GT
#define PCI_EXT_CAP_DSN_SIZEOF 12 #define PCI_EXT_CAP_DSN_SIZEOF 12
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40 #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@ -1144,12 +1145,21 @@
#define PCI_DLF_CAP 0x04 /* Capabilities Register */ #define PCI_DLF_CAP 0x04 /* Capabilities Register */
#define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */ #define PCI_DLF_EXCHANGE_ENABLE 0x80000000 /* Data Link Feature Exchange Enable */
/* Secondary PCIe Capability 8.0 GT/s */
#define PCI_SECPCI_LE_CTRL 0x0c /* Lane Equalization Control Register */
/* Physical Layer 16.0 GT/s */ /* Physical Layer 16.0 GT/s */
#define PCI_PL_16GT_LE_CTRL 0x20 /* Lane Equalization Control Register */ #define PCI_PL_16GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
#define PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK 0x0000000F #define PCI_PL_16GT_LE_CTRL_DSP_TX_PRESET_MASK 0x0000000F
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0 #define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_MASK 0x000000F0
#define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4 #define PCI_PL_16GT_LE_CTRL_USP_TX_PRESET_SHIFT 4
/* Physical Layer 32.0 GT/s */
#define PCI_PL_32GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
/* Physical Layer 64.0 GT/s */
#define PCI_PL_64GT_LE_CTRL 0x20 /* Lane Equalization Control Register */
/* Native PCIe Enclosure Management */ /* Native PCIe Enclosure Management */
#define PCI_NPEM_CAP 0x04 /* NPEM capability register */ #define PCI_NPEM_CAP 0x04 /* NPEM capability register */
#define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */ #define PCI_NPEM_CAP_CAPABLE 0x00000001 /* NPEM Capable */

3
include/standard-headers/linux/virtio_gpu.h
View file

@ -309,8 +309,9 @@ struct virtio_gpu_cmd_submit {
#define VIRTIO_GPU_CAPSET_VIRGL 1 #define VIRTIO_GPU_CAPSET_VIRGL 1
#define VIRTIO_GPU_CAPSET_VIRGL2 2 #define VIRTIO_GPU_CAPSET_VIRGL2 2
/* 3 is reserved for gfxstream */ #define VIRTIO_GPU_CAPSET_GFXSTREAM_VULKAN 3
#define VIRTIO_GPU_CAPSET_VENUS 4 #define VIRTIO_GPU_CAPSET_VENUS 4
#define VIRTIO_GPU_CAPSET_CROSS_DOMAIN 5
#define VIRTIO_GPU_CAPSET_DRM 6 #define VIRTIO_GPU_CAPSET_DRM 6
/* VIRTIO_GPU_CMD_GET_CAPSET_INFO */ /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */

1
include/standard-headers/linux/virtio_pci.h
View file

@ -246,6 +246,7 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LIST_USE 0x1 #define VIRTIO_ADMIN_CMD_LIST_USE 0x1
/* Admin command group type. */ /* Admin command group type. */
#define VIRTIO_ADMIN_GROUP_TYPE_SELF 0x0
#define VIRTIO_ADMIN_GROUP_TYPE_SRIOV 0x1 #define VIRTIO_ADMIN_GROUP_TYPE_SRIOV 0x1
/* Transitional device admin command. */ /* Transitional device admin command. */

9
linux-headers/asm-arm64/kvm.h
View file

@ -419,10 +419,11 @@ enum {
/* Device Control API on vcpu fd */ /* Device Control API on vcpu fd */
#define KVM_ARM_VCPU_PMU_V3_CTRL 0 #define KVM_ARM_VCPU_PMU_V3_CTRL 0
#define KVM_ARM_VCPU_PMU_V3_IRQ 0 #define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1 #define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2 #define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_PMU_V3_SET_PMU 3 #define KVM_ARM_VCPU_PMU_V3_SET_PMU 3
#define KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS 4
#define KVM_ARM_VCPU_TIMER_CTRL 1 #define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0 #define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 #define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1

1
linux-headers/asm-x86/kvm.h
View file

@ -843,6 +843,7 @@ struct kvm_sev_snp_launch_start {
}; };
/* Kept in sync with firmware values for simplicity. */ /* Kept in sync with firmware values for simplicity. */
#define KVM_SEV_PAGE_TYPE_INVALID 0x0
#define KVM_SEV_SNP_PAGE_TYPE_NORMAL 0x1 #define KVM_SEV_SNP_PAGE_TYPE_NORMAL 0x1
#define KVM_SEV_SNP_PAGE_TYPE_ZERO 0x3 #define KVM_SEV_SNP_PAGE_TYPE_ZERO 0x3
#define KVM_SEV_SNP_PAGE_TYPE_UNMEASURED 0x4 #define KVM_SEV_SNP_PAGE_TYPE_UNMEASURED 0x4

4
linux-headers/linux/bits.h
View file

@ -4,9 +4,9 @@
#ifndef _LINUX_BITS_H #ifndef _LINUX_BITS_H
#define _LINUX_BITS_H #define _LINUX_BITS_H
#define __GENMASK(h, l) (((~_UL(0)) << (l)) & (~_UL(0) >> (BITS_PER_LONG - 1 - (h)))) #define __GENMASK(h, l) (((~_UL(0)) << (l)) & (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
#define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h)))) #define __GENMASK_ULL(h, l) (((~_ULL(0)) << (l)) & (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
#define __GENMASK_U128(h, l) \ #define __GENMASK_U128(h, l) \
((_BIT128((h)) << 1) - (_BIT128(l))) ((_BIT128((h)) << 1) - (_BIT128(l)))

25
linux-headers/linux/kvm.h
View file

@ -178,6 +178,7 @@ struct kvm_xen_exit {
#define KVM_EXIT_NOTIFY 37 #define KVM_EXIT_NOTIFY 37
#define KVM_EXIT_LOONGARCH_IOCSR 38 #define KVM_EXIT_LOONGARCH_IOCSR 38
#define KVM_EXIT_MEMORY_FAULT 39 #define KVM_EXIT_MEMORY_FAULT 39
#define KVM_EXIT_TDX 40
/* For KVM_EXIT_INTERNAL_ERROR */ /* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */ /* Emulate instruction failed. */
@ -439,6 +440,27 @@ struct kvm_run {
__u64 gpa; __u64 gpa;
__u64 size; __u64 size;
} memory_fault; } memory_fault;
/* KVM_EXIT_TDX */
struct {
__u64 flags;
__u64 nr;
union {
struct {
__u64 ret;
__u64 data[5];
} unknown;
struct {
__u64 ret;
__u64 gpa;
__u64 size;
} get_quote;
struct {
__u64 ret;
__u64 leaf;
__u64 r11, r12, r13, r14;
} get_tdvmcall_info;
};
} tdx;
/* Fix the size of the union. */ /* Fix the size of the union. */
char padding[256]; char padding[256];
}; };
@ -923,6 +945,9 @@ struct kvm_enable_cap {
#define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237 #define KVM_CAP_X86_APIC_BUS_CYCLES_NS 237
#define KVM_CAP_X86_GUEST_MODE 238 #define KVM_CAP_X86_GUEST_MODE 238
#define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239 #define KVM_CAP_ARM_WRITABLE_IMP_ID_REGS 239
#define KVM_CAP_ARM_EL2 240
#define KVM_CAP_ARM_EL2_E2H0 241
#define KVM_CAP_RISCV_MP_STATE_RESET 242
struct kvm_irq_routing_irqchip { struct kvm_irq_routing_irqchip {
__u32 irqchip; __u32 irqchip;

4
linux-headers/linux/vhost.h
View file

@ -28,10 +28,10 @@
/* Set current process as the (exclusive) owner of this file descriptor. This /* Set current process as the (exclusive) owner of this file descriptor. This
* must be called before any other vhost command. Further calls to * must be called before any other vhost command. Further calls to
* VHOST_OWNER_SET fail until VHOST_OWNER_RESET is called. */ * VHOST_SET_OWNER fail until VHOST_RESET_OWNER is called. */
#define VHOST_SET_OWNER _IO(VHOST_VIRTIO, 0x01) #define VHOST_SET_OWNER _IO(VHOST_VIRTIO, 0x01)
/* Give up ownership, and reset the device to default values. /* Give up ownership, and reset the device to default values.
* Allows subsequent call to VHOST_OWNER_SET to succeed. */ * Allows subsequent call to VHOST_SET_OWNER to succeed. */
#define VHOST_RESET_OWNER _IO(VHOST_VIRTIO, 0x02) #define VHOST_RESET_OWNER _IO(VHOST_VIRTIO, 0x02)
/* Set up/modify memory layout */ /* Set up/modify memory layout */