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riscv/sifive_u: Manually define the machine

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Instead of using the DEFINE_MACHINE() macro to define the machine let's
do it manually. This allows us to specify machine properties.

This patch is no functional change.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
This commit is contained in:
Alistair Francis 2019-10-08 16:32:14 -07:00 • committed by Palmer Dabbelt
parent 1b3a230870
commit 687caef13d
No known key found for this signature in database
GPG key ID: EF4CA1502CCBAB41
2 changed files with 37 additions and 14 deletions
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7
include/hw/riscv/sifive_u.h
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@ -44,12 +44,17 @@ typedef struct SiFiveUSoCState {
CadenceGEMState gem;
} SiFiveUSoCState;
#define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u")
#define RISCV_U_MACHINE(obj) \
OBJECT_CHECK(SiFiveUState, (obj), TYPE_RISCV_U_MACHINE)
typedef struct SiFiveUState {
/*< private >*/
SysBusDevice parent_obj;
MachineState parent_obj;
/*< public >*/
SiFiveUSoCState soc;
void *fdt;
int fdt_size;
} SiFiveUState;