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aspeed: add support for multiple NICs

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The Aspeed SoCs have two MACs. Extend the Aspeed model to support a
second NIC.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190618165311.27066-7-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2019-07-01 17:26:16 +01:00 • committed by Peter Maydell
parent ece09beec4
commit 6734099048
2 changed files with 21 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

23
hw/arm/aspeed_soc.c
View file

@ -234,8 +234,10 @@ static void aspeed_soc_init(Object *obj)
sc->info->silicon_rev); sc->info->silicon_rev);
} }
sysbus_init_child_obj(obj, "ftgmac100", OBJECT(&s->ftgmac100), for (i = 0; i < ASPEED_MACS_NUM; i++) {
sizeof(s->ftgmac100), TYPE_FTGMAC100); sysbus_init_child_obj(obj, "ftgmac100[*]", OBJECT(&s->ftgmac100[i]),
sizeof(s->ftgmac100[i]), TYPE_FTGMAC100);
}
} }
static void aspeed_soc_realize(DeviceState *dev, Error **errp) static void aspeed_soc_realize(DeviceState *dev, Error **errp)
@ -382,19 +384,22 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
} }
/* Net */ /* Net */
qdev_set_nic_properties(DEVICE(&s->ftgmac100), &nd_table[0]); for (i = 0; i < nb_nics; i++) {
object_property_set_bool(OBJECT(&s->ftgmac100), true, "aspeed", &err); qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]);
object_property_set_bool(OBJECT(&s->ftgmac100), true, "realized", object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed",
&err);
object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized",
&local_err); &local_err);
error_propagate(&err, local_err); error_propagate(&err, local_err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);
return; return;
} }
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100), 0, sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
sc->info->memmap[ASPEED_ETH1]); sc->info->memmap[ASPEED_ETH1 + i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100), 0, sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
aspeed_soc_get_irq(s, ASPEED_ETH1)); aspeed_soc_get_irq(s, ASPEED_ETH1 + i));
}
} }
static Property aspeed_soc_properties[] = { static Property aspeed_soc_properties[] = {
DEFINE_PROP_UINT32("num-cpus", AspeedSoCState, num_cpus, 0), DEFINE_PROP_UINT32("num-cpus", AspeedSoCState, num_cpus, 0),

3
include/hw/arm/aspeed_soc.h
View file

@ -25,6 +25,7 @@
#define ASPEED_SPIS_NUM 2 #define ASPEED_SPIS_NUM 2
#define ASPEED_WDTS_NUM 3 #define ASPEED_WDTS_NUM 3
#define ASPEED_CPUS_NUM 2 #define ASPEED_CPUS_NUM 2
#define ASPEED_MACS_NUM 2
typedef struct AspeedSoCState { typedef struct AspeedSoCState {
/*< private >*/ /*< private >*/
@ -43,7 +44,7 @@ typedef struct AspeedSoCState {
AspeedSMCState spi[ASPEED_SPIS_NUM]; AspeedSMCState spi[ASPEED_SPIS_NUM];
AspeedSDMCState sdmc; AspeedSDMCState sdmc;
AspeedWDTState wdt[ASPEED_WDTS_NUM]; AspeedWDTState wdt[ASPEED_WDTS_NUM];
FTGMAC100State ftgmac100; FTGMAC100State ftgmac100[ASPEED_MACS_NUM];
} AspeedSoCState; } AspeedSoCState;
#define TYPE_ASPEED_SOC "aspeed-soc" #define TYPE_ASPEED_SOC "aspeed-soc"