cleanup: Tweak and re-run return_directly.cocci

Tweak the semantic patch to drop redundant parenthesis around the
return expression.

Coccinelle drops a comment in hw/rdma/vmw/pvrdma_cmd.c; restored
manually.

Coccinelle messes up vmdk_co_create(), not sure why.  Change dropped,
will be done manually in the next commit.

Line breaks in target/avr/cpu.h and hw/rdma/vmw/pvrdma_cmd.c tidied up
manually.

Whitespace in tools/virtiofsd/fuse_lowlevel.c tidied up manually.

checkpatch.pl complains "return of an errno should typically be -ve"
two times for hw/9pfs/9p-synth.c.  Preexisting, the patch merely makes
it visible to checkpatch.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20221122134917.1217307-2-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
This commit is contained in:
Markus Armbruster 2022-11-22 14:49:16 +01:00
parent 10220d2f96
commit 66997c42e0
27 changed files with 70 additions and 204 deletions

View file

@ -3281,15 +3281,12 @@ target_ulong helper_dextr_l(target_ulong ac, target_ulong shift,
CPUMIPSState *env)
{
uint64_t temp[3];
target_ulong ret;
shift = shift & 0x3F;
mipsdsp_rndrashift_acc(temp, ac, shift, env);
ret = (temp[1] << 63) | (temp[0] >> 1);
return ret;
return (temp[1] << 63) | (temp[0] >> 1);
}
target_ulong helper_dextr_r_l(target_ulong ac, target_ulong shift,
@ -3297,7 +3294,6 @@ target_ulong helper_dextr_r_l(target_ulong ac, target_ulong shift,
{
uint64_t temp[3];
uint32_t temp128;
target_ulong ret;
shift = shift & 0x3F;
mipsdsp_rndrashift_acc(temp, ac, shift, env);
@ -3317,9 +3313,7 @@ target_ulong helper_dextr_r_l(target_ulong ac, target_ulong shift,
set_DSPControl_overflow_flag(1, 23, env);
}
ret = (temp[1] << 63) | (temp[0] >> 1);
return ret;
return (temp[1] << 63) | (temp[0] >> 1);
}
target_ulong helper_dextr_rs_l(target_ulong ac, target_ulong shift,
@ -3327,7 +3321,6 @@ target_ulong helper_dextr_rs_l(target_ulong ac, target_ulong shift,
{
uint64_t temp[3];
uint32_t temp128;
target_ulong ret;
shift = shift & 0x3F;
mipsdsp_rndrashift_acc(temp, ac, shift, env);
@ -3354,9 +3347,7 @@ target_ulong helper_dextr_rs_l(target_ulong ac, target_ulong shift,
set_DSPControl_overflow_flag(1, 23, env);
}
ret = (temp[1] << 63) | (temp[0] >> 1);
return ret;
return (temp[1] << 63) | (temp[0] >> 1);
}
#endif