hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI

Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream
link of GQSPI to CSU DMA.

Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Xuzhou Cheng 2021-03-03 21:52:52 +08:00 committed by Peter Maydell
parent 21bce3717e
commit 668351a548
3 changed files with 15 additions and 0 deletions

View file

@ -353,6 +353,7 @@ config XLNX_ZYNQMP_ARM
select SSI_M25P80
select XILINX_AXI
select XILINX_SPIPS
select XLNX_CSU_DMA
select XLNX_ZYNQMP
select XLNX_ZDMA