mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-09 10:34:58 -06:00
xlnx-zynqmp: Connect the four OCM banks
The Xilinx EP108 has four separate OCM banks which are located adjacent to each other. This patch adds the four banks to the ZynqMP SoC. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: afa6ba31163a5d541a0bef4b0dc11f2597e0c495.1436813543.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
34a4450434
commit
6675d71915
2 changed files with 21 additions and 0 deletions
|
@ -101,6 +101,21 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
|
|||
qemu_irq gic_spi[GIC_NUM_SPI_INTR];
|
||||
Error *err = NULL;
|
||||
|
||||
/* Create the four OCM banks */
|
||||
for (i = 0; i < XLNX_ZYNQMP_NUM_OCM_BANKS; i++) {
|
||||
char *ocm_name = g_strdup_printf("zynqmp.ocm_ram_bank_%d", i);
|
||||
|
||||
memory_region_init_ram(&s->ocm_ram[i], NULL, ocm_name,
|
||||
XLNX_ZYNQMP_OCM_RAM_SIZE, &error_abort);
|
||||
vmstate_register_ram_global(&s->ocm_ram[i]);
|
||||
memory_region_add_subregion(get_system_memory(),
|
||||
XLNX_ZYNQMP_OCM_RAM_0_ADDRESS +
|
||||
i * XLNX_ZYNQMP_OCM_RAM_SIZE,
|
||||
&s->ocm_ram[i]);
|
||||
|
||||
g_free(ocm_name);
|
||||
}
|
||||
|
||||
qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32);
|
||||
qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);
|
||||
qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", XLNX_ZYNQMP_NUM_APU_CPUS);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue