motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-12-11 16:00:50 -07:00
Code Issues Projects Releases Packages Wiki Activity Actions

tci: Fix for AREG0 free mode

Browse source 
Support for helper functions with 5 arguments was missing
in the code generator and in the interpreter.

There is no need to pass the constant TCG_AREG0 from the
code generator to the interpreter. Remove that code for
the INDEX_op_qemu_st* opcodes.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Stefan Weil 2012-09-18 22:43:38 +02:00 • committed by Aurelien Jarno
parent ac05f34924
commit 6673f47da2
2 changed files with 14 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

13
tci.c
View file

@ -36,17 +36,19 @@
tcg_abort(); \
} while (0)
#if MAX_OPC_PARAM_IARGS != 4
#if MAX_OPC_PARAM_IARGS != 5
# error Fix needed, number of supported input arguments changed!
#endif
#if TCG_TARGET_REG_BITS == 32
typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong);
#else
typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong);
tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong);
#endif
/* TCI can optionally use a global register variable for env. */
@ -489,14 +491,17 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *cpustate, uint8_t *tb_ptr)
tci_read_reg(TCG_REG_R5),
tci_read_reg(TCG_REG_R6),
tci_read_reg(TCG_REG_R7),
tci_read_reg(TCG_REG_R8));
tci_read_reg(TCG_REG_R8),
tci_read_reg(TCG_REG_R9),
tci_read_reg(TCG_REG_R10));
tci_write_reg(TCG_REG_R0, tmp64);
tci_write_reg(TCG_REG_R1, tmp64 >> 32);
#else
tmp64 = ((helper_function)t0)(tci_read_reg(TCG_REG_R0),
tci_read_reg(TCG_REG_R1),
tci_read_reg(TCG_REG_R2),
tci_read_reg(TCG_REG_R3));
tci_read_reg(TCG_REG_R3),
tci_read_reg(TCG_REG_R5));
tci_write_reg(TCG_REG_R0, tmp64);
#endif
break;