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Hexagon (target/hexagon) move store size tracking to translation
The store width is needed for packet commit, so it is stored in ctx->store_width. Currently, it is set when a store has a TCG override instead of a QEMU helper. In the QEMU helper case, the ctx->store_width is not set, we invoke a helper during packet commit that uses the runtime store width. This patch ensures ctx->store_width is set for all store instructions, so performance is improved because packet commit can generate the proper TCG store rather than the generic helper. We do this by - Use the attributes from the instructions during translation to set ctx->store_width - Remove setting of ctx->store_width from genptr.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220920080746.26791-3-tsimpson@quicinc.com>
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e2be9a5c5f
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661ad999c5
3 changed files with 41 additions and 28 deletions
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@ -156,7 +156,7 @@
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__builtin_choose_expr(TYPE_TCGV(X), \
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gen_store1, (void)0))
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#define MEM_STORE1(VA, DATA, SLOT) \
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MEM_STORE1_FUNC(DATA)(cpu_env, VA, DATA, ctx, SLOT)
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MEM_STORE1_FUNC(DATA)(cpu_env, VA, DATA, SLOT)
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#define MEM_STORE2_FUNC(X) \
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__builtin_choose_expr(TYPE_INT(X), \
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@ -164,7 +164,7 @@
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__builtin_choose_expr(TYPE_TCGV(X), \
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gen_store2, (void)0))
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#define MEM_STORE2(VA, DATA, SLOT) \
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MEM_STORE2_FUNC(DATA)(cpu_env, VA, DATA, ctx, SLOT)
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MEM_STORE2_FUNC(DATA)(cpu_env, VA, DATA, SLOT)
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#define MEM_STORE4_FUNC(X) \
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__builtin_choose_expr(TYPE_INT(X), \
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@ -172,7 +172,7 @@
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__builtin_choose_expr(TYPE_TCGV(X), \
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gen_store4, (void)0))
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#define MEM_STORE4(VA, DATA, SLOT) \
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MEM_STORE4_FUNC(DATA)(cpu_env, VA, DATA, ctx, SLOT)
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MEM_STORE4_FUNC(DATA)(cpu_env, VA, DATA, SLOT)
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#define MEM_STORE8_FUNC(X) \
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__builtin_choose_expr(TYPE_INT(X), \
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@ -180,7 +180,7 @@
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__builtin_choose_expr(TYPE_TCGV_I64(X), \
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gen_store8, (void)0))
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#define MEM_STORE8(VA, DATA, SLOT) \
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MEM_STORE8_FUNC(DATA)(cpu_env, VA, DATA, ctx, SLOT)
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MEM_STORE8_FUNC(DATA)(cpu_env, VA, DATA, SLOT)
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#else
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#define MEM_LOAD1s(VA) ((int8_t)mem_load1(env, slot, VA))
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#define MEM_LOAD1u(VA) ((uint8_t)mem_load1(env, slot, VA))
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