hw/riscv/sifive_e: Create a SiFive E SoC object

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Michael Clark <mjc@sifive.com>
This commit is contained in:
Alistair Francis 2018-05-03 16:54:02 -07:00
parent 2308092b2b
commit 651cd8b7e1
2 changed files with 83 additions and 27 deletions

View file

@ -19,13 +19,25 @@
#ifndef HW_SIFIVE_E_H
#define HW_SIFIVE_E_H
#define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"
#define RISCV_E_SOC(obj) \
OBJECT_CHECK(SiFiveESoCState, (obj), TYPE_RISCV_E_SOC)
typedef struct SiFiveESoCState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
RISCVHartArrayState cpus;
DeviceState *plic;
} SiFiveESoCState;
typedef struct SiFiveEState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
RISCVHartArrayState soc;
DeviceState *plic;
SiFiveESoCState soc;
} SiFiveEState;
enum {