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i8254: convert to qdev
Convert to qdev. Don't expose PITState. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
parent
c74b88dffc
commit
64d7e9a421
9 changed files with 75 additions and 40 deletions
61
hw/i8254.c
61
hw/i8254.c
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@ -53,9 +53,12 @@ typedef struct PITChannelState {
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qemu_irq irq;
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} PITChannelState;
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struct PITState {
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typedef struct PITState {
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ISADevice dev;
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uint32_t irq;
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uint32_t iobase;
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PITChannelState channels[3];
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};
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} PITState;
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static PITState pit_state;
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@ -119,8 +122,9 @@ static int pit_get_out1(PITChannelState *s, int64_t current_time)
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return out;
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}
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int pit_get_out(PITState *pit, int channel, int64_t current_time)
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int pit_get_out(ISADevice *dev, int channel, int64_t current_time)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return pit_get_out1(s, current_time);
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}
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@ -179,8 +183,9 @@ static int64_t pit_get_next_transition_time(PITChannelState *s,
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}
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/* val must be 0 or 1 */
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void pit_set_gate(PITState *pit, int channel, int val)
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void pit_set_gate(ISADevice *dev, int channel, int val)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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switch(s->mode) {
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@ -210,20 +215,23 @@ void pit_set_gate(PITState *pit, int channel, int val)
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s->gate = val;
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}
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int pit_get_gate(PITState *pit, int channel)
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int pit_get_gate(ISADevice *dev, int channel)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return s->gate;
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}
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int pit_get_initial_count(PITState *pit, int channel)
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int pit_get_initial_count(ISADevice *dev, int channel)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return s->count;
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}
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int pit_get_mode(PITState *pit, int channel)
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int pit_get_mode(ISADevice *dev, int channel)
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{
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s = &pit->channels[channel];
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return s->mode;
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}
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@ -462,9 +470,9 @@ static const VMStateDescription vmstate_pit = {
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}
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};
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static void pit_reset(void *opaque)
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static void pit_reset(DeviceState *dev)
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{
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PITState *pit = opaque;
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PITState *pit = container_of(dev, PITState, dev.qdev);
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PITChannelState *s;
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int i;
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@ -498,20 +506,39 @@ void hpet_pit_enable(void)
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pit_load_count(s, 0);
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}
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PITState *pit_init(int base, qemu_irq irq)
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static int pit_initfn(ISADevice *dev)
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{
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PITState *pit = &pit_state;
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PITState *pit = DO_UPCAST(PITState, dev, dev);
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PITChannelState *s;
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s = &pit->channels[0];
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/* the timer 0 is connected to an IRQ */
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s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s);
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s->irq = irq;
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s->irq = isa_reserve_irq(pit->irq);
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vmstate_register(NULL, base, &vmstate_pit, pit);
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qemu_register_reset(pit_reset, pit);
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register_ioport_write(base, 4, 1, pit_ioport_write, pit);
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register_ioport_read(base, 3, 1, pit_ioport_read, pit);
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register_ioport_write(pit->iobase, 4, 1, pit_ioport_write, pit);
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register_ioport_read(pit->iobase, 3, 1, pit_ioport_read, pit);
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isa_init_ioport(dev, pit->iobase);
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return pit;
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return 0;
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}
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static ISADeviceInfo pit_info = {
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.qdev.name = "isa-pit",
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.qdev.size = sizeof(PITState),
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.qdev.vmsd = &vmstate_pit,
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.qdev.reset = pit_reset,
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.qdev.no_user = 1,
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.init = pit_initfn,
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.qdev.props = (Property[]) {
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DEFINE_PROP_UINT32("irq", PITState, irq, -1),
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DEFINE_PROP_HEX32("iobase", PITState, iobase, -1),
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DEFINE_PROP_END_OF_LIST(),
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},
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};
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static void pit_register(void)
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{
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isa_qdev_register(&pit_info);
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}
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device_init(pit_register)
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