mirror of
https://github.com/Motorhead1991/qemu.git
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CPU feature selection support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
0828b4485a
commit
64a88d5d3a
6 changed files with 409 additions and 231 deletions
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@ -30,6 +30,7 @@
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#include "qemu-common.h"
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//#define DEBUG_MMU
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//#define DEBUG_FEATURES
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typedef struct sparc_def_t sparc_def_t;
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@ -43,9 +44,10 @@ struct sparc_def_t {
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uint32_t mmu_cxr_mask;
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uint32_t mmu_sfsr_mask;
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uint32_t mmu_trcr_mask;
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uint32_t features;
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};
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static const sparc_def_t *cpu_sparc_find_by_name(const unsigned char *name);
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static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model);
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/* Sparc MMU emulation */
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@ -684,19 +686,14 @@ void cpu_reset(CPUSPARCState *env)
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#endif
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}
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CPUSPARCState *cpu_sparc_init(const char *cpu_model)
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static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model)
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{
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CPUSPARCState *env;
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const sparc_def_t *def;
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sparc_def_t def1, *def = &def1;
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def = cpu_sparc_find_by_name(cpu_model);
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if (!def)
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return NULL;
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if (cpu_sparc_find_by_name(def, cpu_model) < 0)
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return -1;
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env = qemu_mallocz(sizeof(CPUSPARCState));
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if (!env)
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return NULL;
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cpu_exec_init(env);
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env->features = def->features;
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env->cpu_model_str = cpu_model;
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env->version = def->iu_version;
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env->fsr = def->fpu_version;
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@ -709,9 +706,29 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model)
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env->mmuregs[0] |= def->mmu_version;
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cpu_sparc_set_id(env, 0);
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#endif
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return 0;
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}
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static void cpu_sparc_close(CPUSPARCState *env)
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{
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free(env);
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}
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CPUSPARCState *cpu_sparc_init(const char *cpu_model)
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{
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CPUSPARCState *env;
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env = qemu_mallocz(sizeof(CPUSPARCState));
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if (!env)
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return NULL;
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cpu_exec_init(env);
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gen_intermediate_code_init(env);
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if (cpu_sparc_register(env, cpu_model) < 0) {
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cpu_sparc_close(env);
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return NULL;
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}
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cpu_reset(env);
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return env;
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@ -732,6 +749,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Fujitsu Sparc64 III",
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@ -739,6 +757,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Fujitsu Sparc64 IV",
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@ -746,6 +765,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Fujitsu Sparc64 V",
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@ -753,6 +773,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI UltraSparc I",
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@ -760,6 +781,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI UltraSparc II",
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@ -767,6 +789,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI UltraSparc IIi",
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@ -774,6 +797,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI UltraSparc IIe",
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@ -781,6 +805,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Sun UltraSparc III",
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@ -788,6 +813,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Sun UltraSparc III Cu",
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@ -795,6 +821,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Sun UltraSparc IIIi",
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@ -802,6 +829,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Sun UltraSparc IV",
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@ -809,6 +837,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Sun UltraSparc IV+",
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@ -816,6 +845,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Sun UltraSparc IIIi+",
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@ -823,6 +853,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "NEC UltraSparc I",
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@ -830,6 +861,7 @@ static const sparc_def_t sparc_defs[] = {
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| (MAXTL << 8) | (NWINDOWS - 1)),
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.fpu_version = 0x00000000,
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.mmu_version = 0,
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.features = CPU_DEFAULT_FEATURES,
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},
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#else
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{
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@ -842,6 +874,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_FEATURE_FLOAT,
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},
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{
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.name = "Fujitsu MB86904",
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@ -853,6 +886,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x000000ff,
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.mmu_sfsr_mask = 0x00016fff,
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.mmu_trcr_mask = 0x00ffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Fujitsu MB86907",
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@ -864,6 +898,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x000000ff,
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.mmu_sfsr_mask = 0x00016fff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "LSI L64811",
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@ -875,6 +910,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
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},
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{
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.name = "Cypress CY7C601",
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@ -886,6 +922,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
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},
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{
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.name = "Cypress CY7C611",
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@ -897,6 +934,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
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},
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{
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.name = "TI SuperSparc II",
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@ -908,6 +946,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000ffff,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI MicroSparc I",
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@ -919,6 +958,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0x00016fff,
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.mmu_trcr_mask = 0x0000003f,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI MicroSparc II",
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@ -930,6 +970,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x000000ff,
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.mmu_sfsr_mask = 0x00016fff,
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.mmu_trcr_mask = 0x00ffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI MicroSparc IIep",
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@ -941,6 +982,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x000000ff,
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.mmu_sfsr_mask = 0x00016bff,
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.mmu_trcr_mask = 0x00ffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI SuperSparc 51",
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@ -952,6 +994,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000ffff,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "TI SuperSparc 61",
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@ -963,6 +1006,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000ffff,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Ross RT625",
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@ -974,6 +1018,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "Ross RT620",
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@ -985,6 +1030,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "BIT B5010",
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@ -996,6 +1042,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_FEATURE_FLOAT | CPU_FEATURE_SWAP | CPU_FEATURE_FSQRT,
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},
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{
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.name = "Matsushita MN10501",
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@ -1007,6 +1054,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_FEATURE_FLOAT | CPU_FEATURE_MUL | CPU_FEATURE_FSQRT,
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},
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{
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.name = "Weitek W8601",
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@ -1018,6 +1066,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "LEON2",
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@ -1029,6 +1078,7 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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{
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.name = "LEON3",
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@ -1040,20 +1090,137 @@ static const sparc_def_t sparc_defs[] = {
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.mmu_cxr_mask = 0x0000003f,
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.mmu_sfsr_mask = 0xffffffff,
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.mmu_trcr_mask = 0xffffffff,
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.features = CPU_DEFAULT_FEATURES,
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},
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#endif
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};
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static const sparc_def_t *cpu_sparc_find_by_name(const unsigned char *name)
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static const char * const feature_name[] = {
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"float",
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"float128",
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"swap",
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"mul",
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"div",
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"flush",
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"fsqrt",
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"fmul",
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"vis1",
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"vis2",
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};
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static void print_features(FILE *f,
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int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
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uint32_t features, const char *prefix)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(feature_name); i++)
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if (feature_name[i] && (features & (1 << i))) {
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if (prefix)
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(*cpu_fprintf)(f, "%s", prefix);
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(*cpu_fprintf)(f, "%s ", feature_name[i]);
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}
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}
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static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(feature_name); i++)
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if (feature_name[i] && !strcmp(flagname, feature_name[i])) {
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*features |= 1 << i;
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return;
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}
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fprintf(stderr, "CPU feature %s not found\n", flagname);
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}
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static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const unsigned char *cpu_model)
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{
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unsigned int i;
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const sparc_def_t *def = NULL;
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char *s = strdup(cpu_model);
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char *featurestr, *name = strtok(s, ",");
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uint32_t plus_features = 0;
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uint32_t minus_features = 0;
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long long iu_version;
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uint32_t fpu_version, mmu_version;
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for (i = 0; i < sizeof(sparc_defs) / sizeof(sparc_def_t); i++) {
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if (strcasecmp(name, sparc_defs[i].name) == 0) {
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return &sparc_defs[i];
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def = &sparc_defs[i];
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}
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}
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return NULL;
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if (!def)
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goto error;
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||||
memcpy(cpu_def, def, sizeof(*def));
|
||||
|
||||
featurestr = strtok(NULL, ",");
|
||||
while (featurestr) {
|
||||
char *val;
|
||||
|
||||
if (featurestr[0] == '+') {
|
||||
add_flagname_to_bitmaps(featurestr + 1, &plus_features);
|
||||
} else if (featurestr[0] == '-') {
|
||||
add_flagname_to_bitmaps(featurestr + 1, &minus_features);
|
||||
} else if ((val = strchr(featurestr, '='))) {
|
||||
*val = 0; val++;
|
||||
if (!strcmp(featurestr, "iu_version")) {
|
||||
char *err;
|
||||
|
||||
iu_version = strtoll(val, &err, 0);
|
||||
if (!*val || *err) {
|
||||
fprintf(stderr, "bad numerical value %s\n", val);
|
||||
goto error;
|
||||
}
|
||||
cpu_def->iu_version = iu_version;
|
||||
#ifdef DEBUG_FEATURES
|
||||
fprintf(stderr, "iu_version %llx\n", iu_version);
|
||||
#endif
|
||||
} else if (!strcmp(featurestr, "fpu_version")) {
|
||||
char *err;
|
||||
|
||||
fpu_version = strtol(val, &err, 0);
|
||||
if (!*val || *err) {
|
||||
fprintf(stderr, "bad numerical value %s\n", val);
|
||||
goto error;
|
||||
}
|
||||
cpu_def->fpu_version = fpu_version;
|
||||
#ifdef DEBUG_FEATURES
|
||||
fprintf(stderr, "fpu_version %llx\n", fpu_version);
|
||||
#endif
|
||||
} else if (!strcmp(featurestr, "mmu_version")) {
|
||||
char *err;
|
||||
|
||||
mmu_version = strtol(val, &err, 0);
|
||||
if (!*val || *err) {
|
||||
fprintf(stderr, "bad numerical value %s\n", val);
|
||||
goto error;
|
||||
}
|
||||
cpu_def->mmu_version = mmu_version;
|
||||
#ifdef DEBUG_FEATURES
|
||||
fprintf(stderr, "mmu_version %llx\n", mmu_version);
|
||||
#endif
|
||||
} else {
|
||||
fprintf(stderr, "unrecognized feature %s\n", featurestr);
|
||||
goto error;
|
||||
}
|
||||
} else {
|
||||
fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
|
||||
goto error;
|
||||
}
|
||||
featurestr = strtok(NULL, ",");
|
||||
}
|
||||
cpu_def->features |= plus_features;
|
||||
cpu_def->features &= ~minus_features;
|
||||
#ifdef DEBUG_FEATURES
|
||||
print_features(stderr, fprintf, cpu_def->features, NULL);
|
||||
#endif
|
||||
free(s);
|
||||
return 0;
|
||||
|
||||
error:
|
||||
free(s);
|
||||
return -1;
|
||||
}
|
||||
|
||||
void sparc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
|
||||
|
|
@ -1061,12 +1228,19 @@ void sparc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
|
|||
unsigned int i;
|
||||
|
||||
for (i = 0; i < sizeof(sparc_defs) / sizeof(sparc_def_t); i++) {
|
||||
(*cpu_fprintf)(f, "Sparc %16s IU " TARGET_FMT_lx " FPU %08x MMU %08x\n",
|
||||
(*cpu_fprintf)(f, "Sparc %16s IU " TARGET_FMT_lx " FPU %08x MMU %08x ",
|
||||
sparc_defs[i].name,
|
||||
sparc_defs[i].iu_version,
|
||||
sparc_defs[i].fpu_version,
|
||||
sparc_defs[i].mmu_version);
|
||||
print_features(f, cpu_fprintf, CPU_DEFAULT_FEATURES & ~sparc_defs[i].features, "-");
|
||||
print_features(f, cpu_fprintf, ~CPU_DEFAULT_FEATURES & sparc_defs[i].features, "+");
|
||||
(*cpu_fprintf)(f, "\n");
|
||||
}
|
||||
(*cpu_fprintf)(f, "CPU feature flags (+/-): ");
|
||||
print_features(f, cpu_fprintf, -1, NULL);
|
||||
(*cpu_fprintf)(f, "\n");
|
||||
(*cpu_fprintf)(f, "Numerical features (=): iu_version fpu_version mmu_version\n");
|
||||
}
|
||||
|
||||
#define GET_FLAG(a,b) ((env->psr & a)?b:'-')
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue