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tcg/aarch64: Use atom_and_align_for_opc

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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-04-21 17:12:15 +01:00
parent 1c5322d90c
commit 64741d9902
1 changed files with 18 additions and 18 deletions
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36
tcg/aarch64/tcg-target.c.inc
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@ -1593,6 +1593,7 @@ typedef struct {
TCGReg base; TCGReg base;
TCGReg index; TCGReg index;
TCGType index_ext; TCGType index_ext;
TCGAtomAlign aa;
} HostAddress; } HostAddress;
bool tcg_target_has_memory_bswap(MemOp memop) bool tcg_target_has_memory_bswap(MemOp memop)
@ -1646,8 +1647,13 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
TCGType addr_type = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32; TCGType addr_type = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
TCGLabelQemuLdst *ldst = NULL; TCGLabelQemuLdst *ldst = NULL;
MemOp opc = get_memop(oi); MemOp opc = get_memop(oi);
unsigned a_bits = get_alignment_bits(opc); unsigned a_mask;
unsigned a_mask = (1u << a_bits) - 1;
h->aa = atom_and_align_for_opc(s, opc,
have_lse2 ? MO_ATOM_WITHIN16
: MO_ATOM_IFALIGN,
false);
a_mask = (1 << h->aa.align) - 1;
#ifdef CONFIG_SOFTMMU #ifdef CONFIG_SOFTMMU
unsigned s_bits = opc & MO_SIZE; unsigned s_bits = opc & MO_SIZE;
@ -1693,7 +1699,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
* bits within the address. For unaligned access, we check that we don't * bits within the address. For unaligned access, we check that we don't
* cross pages using the address of the last byte of the access. * cross pages using the address of the last byte of the access.
*/ */
if (a_bits >= s_bits) { if (a_mask >= s_mask) {
x3 = addr_reg; x3 = addr_reg;
} else { } else {
tcg_out_insn(s, 3401, ADDI, TARGET_LONG_BITS == 64, tcg_out_insn(s, 3401, ADDI, TARGET_LONG_BITS == 64,
@ -1713,11 +1719,9 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
ldst->label_ptr[0] = s->code_ptr; ldst->label_ptr[0] = s->code_ptr;
tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0); tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0);
*h = (HostAddress){ h->base = TCG_REG_X1,
.base = TCG_REG_X1, h->index = addr_reg;
.index = addr_reg, h->index_ext = addr_type;
.index_ext = addr_type
};
#else #else
if (a_mask) { if (a_mask) {
ldst = new_ldst_label(s); ldst = new_ldst_label(s);
@ -1735,17 +1739,13 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
} }
if (USE_GUEST_BASE) { if (USE_GUEST_BASE) {
*h = (HostAddress){ h->base = TCG_REG_GUEST_BASE;
.base = TCG_REG_GUEST_BASE, h->index = addr_reg;
.index = addr_reg, h->index_ext = addr_type;
.index_ext = addr_type
};
} else { } else {
*h = (HostAddress){ h->base = addr_reg;
.base = addr_reg, h->index = TCG_REG_XZR;
.index = TCG_REG_XZR, h->index_ext = TCG_TYPE_I64;
.index_ext = TCG_TYPE_I64
};
} }
#endif #endif