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target-lm32: Don't overuse CPUState
Scripted conversion: sed -i "s/CPUState/CPULM32State/g" target-lm32/*.[hc] sed -i "s/#define CPULM32State/#define CPUState/" target-lm32/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
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parent
317ac6201a
commit
6393c08de2
5 changed files with 54 additions and 54 deletions
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@ -20,7 +20,7 @@
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#include "cpu.h"
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#include "host-utils.h"
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int cpu_lm32_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
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int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw,
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int mmu_idx)
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{
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int prot;
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@ -37,12 +37,12 @@ int cpu_lm32_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
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return 0;
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}
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target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
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target_phys_addr_t cpu_get_phys_page_debug(CPULM32State *env, target_ulong addr)
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{
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return addr & TARGET_PAGE_MASK;
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}
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void do_interrupt(CPUState *env)
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void do_interrupt(CPULM32State *env)
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{
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qemu_log_mask(CPU_LOG_INT,
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"exception at pc=%x type=%x\n", env->pc, env->exception_index);
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@ -192,9 +192,9 @@ static uint32_t cfg_by_def(const LM32Def *def)
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return cfg;
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}
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CPUState *cpu_lm32_init(const char *cpu_model)
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CPULM32State *cpu_lm32_init(const char *cpu_model)
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{
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CPUState *env;
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CPULM32State *env;
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const LM32Def *def;
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static int tcg_initialized;
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@ -203,7 +203,7 @@ CPUState *cpu_lm32_init(const char *cpu_model)
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return NULL;
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}
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env = g_malloc0(sizeof(CPUState));
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env = g_malloc0(sizeof(CPULM32State));
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env->features = def->features;
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env->num_bps = def->num_breakpoints;
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@ -226,7 +226,7 @@ CPUState *cpu_lm32_init(const char *cpu_model)
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/* Some soc ignores the MSB on the address bus. Thus creating a shadow memory
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* area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
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* 0x80000000-0xffffffff is not cached and used to access IO devices. */
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void cpu_lm32_set_phys_msb_ignore(CPUState *env, int value)
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void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value)
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{
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if (value) {
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env->flags |= LM32_FLAG_IGNORE_MSB;
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@ -235,7 +235,7 @@ void cpu_lm32_set_phys_msb_ignore(CPUState *env, int value)
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}
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}
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void cpu_state_reset(CPUState *env)
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void cpu_state_reset(CPULM32State *env)
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{
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if (qemu_loglevel_mask(CPU_LOG_RESET)) {
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qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
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