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pull-loongarch-20240912

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Merge tag 'pull-loongarch-20240912' of https://gitlab.com/gaosong/qemu into staging

pull-loongarch-20240912

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* tag 'pull-loongarch-20240912' of https://gitlab.com/gaosong/qemu:
  hw/loongarch: Add acpi SPCR table support
  hw/loongarch: virt: pass random seed to fdt
  hw/loongarch: virt: support up to 4 serial ports
  target/loongarch: Support QMP dump-guest-memory
  target/loongarch/kvm: Add vCPU reset function
  hw/loongarch: Remove default enable with VIRTIO_VGA device
  target/loongarch: Add compatible support about VM reboot

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2024-09-13 11:38:15 +01:00
commit 63731c346f
10 changed files with 273 additions and 25 deletions
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9
include/hw/pci-host/ls7a.h
View file

@ -36,17 +36,18 @@
#define VIRT_PCH_PIC_IRQ_NUM 32
#define VIRT_GSI_BASE 64
#define VIRT_DEVICE_IRQS 16
#define VIRT_UART_COUNT 4
#define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
#define VIRT_UART_BASE 0x1fe001e0
#define VIRT_UART_SIZE 0X100
#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 3)
#define VIRT_UART_SIZE 0x100
#define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
#define VIRT_RTC_LEN 0x100
#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 4)
#define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
#define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000
#define VIRT_PLATFORM_BUS_SIZE 0x2000000
#define VIRT_PLATFORM_BUS_NUM_IRQS 2
#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 5)
#define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
#endif