mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-09 02:24:58 -06:00
Replace always_inline with inline
We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
parent
facd285778
commit
636aa20056
13 changed files with 355 additions and 371 deletions
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@ -103,8 +103,7 @@ static void alpha_translate_init(void)
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done_init = 1;
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}
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static always_inline void gen_excp (DisasContext *ctx,
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int exception, int error_code)
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static inline void gen_excp(DisasContext *ctx, int exception, int error_code)
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{
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TCGv_i32 tmp1, tmp2;
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@ -116,12 +115,12 @@ static always_inline void gen_excp (DisasContext *ctx,
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tcg_temp_free_i32(tmp1);
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}
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static always_inline void gen_invalid (DisasContext *ctx)
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static inline void gen_invalid(DisasContext *ctx)
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{
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gen_excp(ctx, EXCP_OPCDEC, 0);
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}
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static always_inline void gen_qemu_ldf (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_ldf(TCGv t0, TCGv t1, int flags)
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{
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TCGv tmp = tcg_temp_new();
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TCGv_i32 tmp32 = tcg_temp_new_i32();
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@ -132,7 +131,7 @@ static always_inline void gen_qemu_ldf (TCGv t0, TCGv t1, int flags)
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tcg_temp_free(tmp);
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}
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static always_inline void gen_qemu_ldg (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_ldg(TCGv t0, TCGv t1, int flags)
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{
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TCGv tmp = tcg_temp_new();
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tcg_gen_qemu_ld64(tmp, t1, flags);
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@ -140,7 +139,7 @@ static always_inline void gen_qemu_ldg (TCGv t0, TCGv t1, int flags)
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tcg_temp_free(tmp);
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}
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static always_inline void gen_qemu_lds (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_lds(TCGv t0, TCGv t1, int flags)
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{
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TCGv tmp = tcg_temp_new();
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TCGv_i32 tmp32 = tcg_temp_new_i32();
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@ -151,22 +150,23 @@ static always_inline void gen_qemu_lds (TCGv t0, TCGv t1, int flags)
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tcg_temp_free(tmp);
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}
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static always_inline void gen_qemu_ldl_l (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_ldl_l(TCGv t0, TCGv t1, int flags)
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{
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tcg_gen_mov_i64(cpu_lock, t1);
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tcg_gen_qemu_ld32s(t0, t1, flags);
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}
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static always_inline void gen_qemu_ldq_l (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_ldq_l(TCGv t0, TCGv t1, int flags)
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{
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tcg_gen_mov_i64(cpu_lock, t1);
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tcg_gen_qemu_ld64(t0, t1, flags);
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}
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static always_inline void gen_load_mem (DisasContext *ctx,
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void (*tcg_gen_qemu_load)(TCGv t0, TCGv t1, int flags),
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int ra, int rb, int32_t disp16,
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int fp, int clear)
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static inline void gen_load_mem(DisasContext *ctx,
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void (*tcg_gen_qemu_load)(TCGv t0, TCGv t1,
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int flags),
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int ra, int rb, int32_t disp16, int fp,
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int clear)
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{
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TCGv addr;
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@ -190,7 +190,7 @@ static always_inline void gen_load_mem (DisasContext *ctx,
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tcg_temp_free(addr);
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}
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static always_inline void gen_qemu_stf (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_stf(TCGv t0, TCGv t1, int flags)
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{
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TCGv_i32 tmp32 = tcg_temp_new_i32();
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TCGv tmp = tcg_temp_new();
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@ -201,7 +201,7 @@ static always_inline void gen_qemu_stf (TCGv t0, TCGv t1, int flags)
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tcg_temp_free_i32(tmp32);
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}
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static always_inline void gen_qemu_stg (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_stg(TCGv t0, TCGv t1, int flags)
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{
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TCGv tmp = tcg_temp_new();
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gen_helper_g_to_memory(tmp, t0);
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@ -209,7 +209,7 @@ static always_inline void gen_qemu_stg (TCGv t0, TCGv t1, int flags)
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tcg_temp_free(tmp);
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}
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static always_inline void gen_qemu_sts (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_sts(TCGv t0, TCGv t1, int flags)
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{
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TCGv_i32 tmp32 = tcg_temp_new_i32();
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TCGv tmp = tcg_temp_new();
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@ -220,7 +220,7 @@ static always_inline void gen_qemu_sts (TCGv t0, TCGv t1, int flags)
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tcg_temp_free_i32(tmp32);
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}
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static always_inline void gen_qemu_stl_c (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_stl_c(TCGv t0, TCGv t1, int flags)
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{
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int l1, l2;
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@ -236,7 +236,7 @@ static always_inline void gen_qemu_stl_c (TCGv t0, TCGv t1, int flags)
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tcg_gen_movi_i64(cpu_lock, -1);
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}
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static always_inline void gen_qemu_stq_c (TCGv t0, TCGv t1, int flags)
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static inline void gen_qemu_stq_c(TCGv t0, TCGv t1, int flags)
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{
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int l1, l2;
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@ -252,10 +252,11 @@ static always_inline void gen_qemu_stq_c (TCGv t0, TCGv t1, int flags)
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tcg_gen_movi_i64(cpu_lock, -1);
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}
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static always_inline void gen_store_mem (DisasContext *ctx,
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void (*tcg_gen_qemu_store)(TCGv t0, TCGv t1, int flags),
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int ra, int rb, int32_t disp16,
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int fp, int clear, int local)
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static inline void gen_store_mem(DisasContext *ctx,
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void (*tcg_gen_qemu_store)(TCGv t0, TCGv t1,
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int flags),
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int ra, int rb, int32_t disp16, int fp,
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int clear, int local)
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{
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TCGv addr;
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if (local)
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@ -288,9 +289,8 @@ static always_inline void gen_store_mem (DisasContext *ctx,
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tcg_temp_free(addr);
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}
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static always_inline void gen_bcond (DisasContext *ctx,
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TCGCond cond,
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int ra, int32_t disp, int mask)
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static inline void gen_bcond(DisasContext *ctx, TCGCond cond, int ra,
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int32_t disp, int mask)
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{
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int l1, l2;
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@ -317,8 +317,8 @@ static always_inline void gen_bcond (DisasContext *ctx,
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gen_set_label(l2);
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}
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static always_inline void gen_fbcond (DisasContext *ctx, int opc,
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int ra, int32_t disp16)
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static inline void gen_fbcond(DisasContext *ctx, int opc, int ra,
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int32_t disp16)
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{
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int l1, l2;
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TCGv tmp;
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@ -363,9 +363,8 @@ static always_inline void gen_fbcond (DisasContext *ctx, int opc,
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gen_set_label(l2);
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}
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static always_inline void gen_cmov (TCGCond inv_cond,
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int ra, int rb, int rc,
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int islit, uint8_t lit, int mask)
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static inline void gen_cmov(TCGCond inv_cond, int ra, int rb, int rc,
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int islit, uint8_t lit, int mask)
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{
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int l1;
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@ -397,7 +396,7 @@ static always_inline void gen_cmov (TCGCond inv_cond,
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}
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#define FARITH2(name) \
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static always_inline void glue(gen_f, name)(int rb, int rc) \
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static inline void glue(gen_f, name)(int rb, int rc) \
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{ \
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if (unlikely(rc == 31)) \
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return; \
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@ -429,7 +428,7 @@ FARITH2(cvtqlv)
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FARITH2(cvtqlsv)
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#define FARITH3(name) \
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static always_inline void glue(gen_f, name) (int ra, int rb, int rc) \
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static inline void glue(gen_f, name)(int ra, int rb, int rc) \
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{ \
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if (unlikely(rc == 31)) \
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return; \
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@ -480,7 +479,7 @@ FARITH3(cpysn)
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FARITH3(cpyse)
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#define FCMOV(name) \
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static always_inline void glue(gen_f, name) (int ra, int rb, int rc) \
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static inline void glue(gen_f, name)(int ra, int rb, int rc) \
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{ \
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int l1; \
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TCGv tmp; \
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@ -512,9 +511,8 @@ FCMOV(cmpfle)
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FCMOV(cmpfgt)
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/* EXTWH, EXTWH, EXTLH, EXTQH */
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static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
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int ra, int rb, int rc,
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int islit, uint8_t lit)
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static inline void gen_ext_h(void(*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
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int ra, int rb, int rc, int islit, uint8_t lit)
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{
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if (unlikely(rc == 31))
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return;
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@ -543,9 +541,8 @@ static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
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}
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/* EXTBL, EXTWL, EXTWL, EXTLL, EXTQL */
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static always_inline void gen_ext_l(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
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int ra, int rb, int rc,
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int islit, uint8_t lit)
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static inline void gen_ext_l(void(*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
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int ra, int rb, int rc, int islit, uint8_t lit)
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{
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if (unlikely(rc == 31))
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return;
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@ -568,8 +565,8 @@ static always_inline void gen_ext_l(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
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/* Code to call arith3 helpers */
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#define ARITH3(name) \
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static always_inline void glue(gen_, name) (int ra, int rb, int rc, \
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int islit, uint8_t lit) \
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static inline void glue(gen_, name)(int ra, int rb, int rc, int islit,\
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uint8_t lit) \
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{ \
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if (unlikely(rc == 31)) \
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return; \
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@ -617,9 +614,8 @@ ARITH3(umulh)
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ARITH3(mullv)
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ARITH3(mulqv)
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static always_inline void gen_cmp(TCGCond cond,
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int ra, int rb, int rc,
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int islit, uint8_t lit)
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static inline void gen_cmp(TCGCond cond, int ra, int rb, int rc, int islit,
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uint8_t lit)
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{
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int l1, l2;
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TCGv tmp;
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@ -647,7 +643,7 @@ static always_inline void gen_cmp(TCGCond cond,
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gen_set_label(l2);
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}
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static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
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static inline int translate_one(DisasContext *ctx, uint32_t insn)
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{
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uint32_t palcode;
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int32_t disp21, disp16, disp12;
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@ -2336,9 +2332,9 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
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return ret;
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}
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static always_inline void gen_intermediate_code_internal (CPUState *env,
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TranslationBlock *tb,
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int search_pc)
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static inline void gen_intermediate_code_internal(CPUState *env,
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TranslationBlock *tb,
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int search_pc)
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{
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#if defined ALPHA_DEBUG_DISAS
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static int insn_count;
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