ppc/pnv: add a PIR handler to PnvChip

The Processor Identification Register (PIR) is a register that holds a
processor identifier which is used for bus transactions (XSCOM) and
for processor differentiation in multiprocessor systems. It also used
in the interrupt vector entries (IVE) to identify the thread serving
the interrupts.

P9 and P8 have some differences in the CPU PIR encoding.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2016-10-22 11:46:38 +02:00 committed by David Gibson
parent 397a79e757
commit 631adaff31
2 changed files with 32 additions and 0 deletions

View file

@ -58,6 +58,8 @@ typedef struct PnvChipClass {
PnvChipType chip_type;
uint64_t chip_cfam_id;
uint64_t cores_mask;
uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
} PnvChipClass;
#define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-POWER8E"