mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-07-30 05:43:53 -06:00
target/openrisc: Add support for ORFPX64A32
This is hardware support for double-precision floating-point using pairs of 32-bit registers. Fix latent bugs in the heretofore unused helper_itofd and helper_ftoid. Include the bit for cpu "any". Change the default cpu for linux-user to "any". Reviewed-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
fe636d3722
commit
62f2b0389f
7 changed files with 333 additions and 4 deletions
|
@ -9,6 +9,6 @@
|
|||
#define OPENRISC_TARGET_ELF_H
|
||||
static inline const char *cpu_get_model(uint32_t eflags)
|
||||
{
|
||||
return "or1200";
|
||||
return "any";
|
||||
}
|
||||
#endif
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue