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target/xtensa: fix simcall for newer hardware

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After Xtensa release RE.2 simcall opcode has become nop for the
hardware instead of illegal instruction.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2020-05-04 05:15:14 -07:00
parent 2cc2278edf
commit 62ed68e33d
1 changed files with 6 additions and 3 deletions
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9
target/xtensa/translate.c
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@ -2367,9 +2367,10 @@ static bool test_ill_simcall(DisasContext *dc, const OpcodeArg arg[],
#ifdef CONFIG_USER_ONLY #ifdef CONFIG_USER_ONLY
bool ill = true; bool ill = true;
#else #else
bool ill = !semihosting_enabled(); /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */
bool ill = dc->config->hw_version <= 250002 && !semihosting_enabled();
#endif #endif
if (ill) { if (ill || !semihosting_enabled()) {
qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n"); qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n");
} }
return ill; return ill;
@ -2379,7 +2380,9 @@ static void translate_simcall(DisasContext *dc, const OpcodeArg arg[],
const uint32_t par[]) const uint32_t par[])
{ {
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
gen_helper_simcall(cpu_env); if (semihosting_enabled()) {
gen_helper_simcall(cpu_env);
}
#endif #endif
} }