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aspeed queue:
* Aspeed GPIO model extensions * GPIO support for the Aspeed AST1030 SoC * New fby35 machine (AST2600 based) * Extra unit tests for the GPIO and SMC models * Initialization of all UART with serial devices * AST2600 EVB and Documentation update -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmKOUhcACgkQUaNDx8/7 7KF3MBAAuIusIv5HXKEzLNJK2Gyk/qiXy+CAkfr+ZbpAk96JeA5y0fVHtkThSj6k KbNNVAUojWC/AKsvldYxKkcyt5A8nNPkNP6H0c3CGUCrHUo8rdMW9otZGS91uH9+ Xvdq7ANuP/BAGNSXXMJ3p3h6VwOVrJnnRAZR6Xy4ytWZpWnYhnJNca9//0JZ2lu+ 2h/hOlx8IE/c8YcyfixyRtuL4ElobSaC1Ajf/wcByWINEGecbWBrsEJq9F6K8me8 8w2A3dBZaE3FfYJXEaDBqPzmB3dmgsui0DzvHqb6GKLZ1zzTPzc1xwqx0xyfb4iN e3uxC+H1fp6VvHLN21bgl+nQtFEirSxUe0KQkeITjDDzqnnTECrdsSzxJXQ+/fUq yhj63ceijsjqEfupuDtKqafSJTWz/ELNjx0mspFWm0a4zHbp+OzwNBK9eFW+h5gf ydMpEB7hzpJFQT4g2UZSWrYOVRXRZRcswoK5ZxThx90+TDZ3Z+X3Nn8qqmWwbb8s WzqRNMzvl0eh6hbAWcexkoDU1f5TxJ9kJRHQV3cdzp+BMNzMGTyqHetgC3d9MsdR x5adfgMUblXO+SukxUNm+N1KLTET6XNTNAUlHDeb1KMqipbRH9tH5sxOyKFAGHkP 0PY+zN4atV/H8hbAjHrg4b3BOQvHr4ro4Liw4I8XQT/gsjD4bBg= =Vtgk -----END PGP SIGNATURE----- Merge tag 'pull-aspeed-20220525' of https://github.com/legoater/qemu into staging aspeed queue: * Aspeed GPIO model extensions * GPIO support for the Aspeed AST1030 SoC * New fby35 machine (AST2600 based) * Extra unit tests for the GPIO and SMC models * Initialization of all UART with serial devices * AST2600 EVB and Documentation update # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmKOUhcACgkQUaNDx8/7 # 7KF3MBAAuIusIv5HXKEzLNJK2Gyk/qiXy+CAkfr+ZbpAk96JeA5y0fVHtkThSj6k # KbNNVAUojWC/AKsvldYxKkcyt5A8nNPkNP6H0c3CGUCrHUo8rdMW9otZGS91uH9+ # Xvdq7ANuP/BAGNSXXMJ3p3h6VwOVrJnnRAZR6Xy4ytWZpWnYhnJNca9//0JZ2lu+ # 2h/hOlx8IE/c8YcyfixyRtuL4ElobSaC1Ajf/wcByWINEGecbWBrsEJq9F6K8me8 # 8w2A3dBZaE3FfYJXEaDBqPzmB3dmgsui0DzvHqb6GKLZ1zzTPzc1xwqx0xyfb4iN # e3uxC+H1fp6VvHLN21bgl+nQtFEirSxUe0KQkeITjDDzqnnTECrdsSzxJXQ+/fUq # yhj63ceijsjqEfupuDtKqafSJTWz/ELNjx0mspFWm0a4zHbp+OzwNBK9eFW+h5gf # ydMpEB7hzpJFQT4g2UZSWrYOVRXRZRcswoK5ZxThx90+TDZ3Z+X3Nn8qqmWwbb8s # WzqRNMzvl0eh6hbAWcexkoDU1f5TxJ9kJRHQV3cdzp+BMNzMGTyqHetgC3d9MsdR # x5adfgMUblXO+SukxUNm+N1KLTET6XNTNAUlHDeb1KMqipbRH9tH5sxOyKFAGHkP # 0PY+zN4atV/H8hbAjHrg4b3BOQvHr4ro4Liw4I8XQT/gsjD4bBg= # =Vtgk # -----END PGP SIGNATURE----- # gpg: Signature made Wed 25 May 2022 08:58:15 AM PDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20220525' of https://github.com/legoater/qemu: hw/arm/aspeed: Add i2c devices for AST2600 EVB hw/gpio: replace HWADDR_PRIx with PRIx64 hw/gpio support GPIO index mode for write operation. hw/gpio: Add ASPEED GPIO model for AST1030 hw/gpio Add GPIO read/write trace event. hw: aspeed: Init all UART's with serial devices hw: aspeed: Introduce common UART init function hw: aspeed: Ensure AST1030 respects uart-default hw: aspeed: Add uarts_num SoC attribute hw: aspeed: Add missing UART's aspeed: Introduce a get_irq AspeedSoCClass method hw: m25p80: allow write_enable latch get/set docs: aspeed: Add fby35 board hw/arm/aspeed: Add fby35 machine type docs: add minibmc section in aspeed document Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
6291d2588f
14 changed files with 607 additions and 75 deletions
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@ -31,6 +31,7 @@ AST2600 SoC based machines :
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- ``tacoma-bmc`` OpenPOWER Witherspoon POWER9 AST2600 BMC
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- ``rainier-bmc`` IBM Rainier POWER10 BMC
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- ``fuji-bmc`` Facebook Fuji BMC
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- ``fby35-bmc`` Facebook fby35 BMC
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Supported devices
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-----------------
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@ -120,3 +121,64 @@ FMC chip and a bigger (64M) SPI chip, use :
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.. code-block:: bash
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-M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
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Aspeed minibmc family boards (``ast1030-evb``)
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==================================================================
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The QEMU Aspeed machines model mini BMCs of various Aspeed evaluation
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boards. They are based on different releases of the
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Aspeed SoC : the AST1030 integrating an ARM Cortex M4F CPU (200MHz).
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The SoC comes with SRAM, SPI, I2C, etc.
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AST1030 SoC based machines :
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- ``ast1030-evb`` Aspeed AST1030 Evaluation board (Cortex-M4F)
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Supported devices
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-----------------
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* SMP (for the AST1030 Cortex-M4F)
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* Interrupt Controller (VIC)
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* Timer Controller
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* I2C Controller
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* System Control Unit (SCU)
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* SRAM mapping
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* Static Memory Controller (SMC or FMC) - Only SPI Flash support
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* SPI Memory Controller
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* USB 2.0 Controller
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* Watchdog Controller
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* GPIO Controller (Master only)
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* UART
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* LPC Peripheral Controller (a subset of subdevices are supported)
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* Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
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* ADC
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Missing devices
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---------------
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* PWM and Fan Controller
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* Slave GPIO Controller
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* PECI Controller
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* Mailbox Controller
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* Virtual UART
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* eSPI Controller
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* I3C Controller
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Boot options
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------------
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The Aspeed machines can be started using the ``-kernel`` to load a
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Zephyr OS or from a firmware. Images can be downloaded from the
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ASPEED GitHub release repository :
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https://github.com/AspeedTech-BMC/zephyr/releases
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To boot a kernel directly from a Zephyr build tree:
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.. code-block:: bash
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$ qemu-system-arm -M ast1030-evb -nographic \
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-kernel zephyr.elf
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