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hw/mips/loongson3_virt: Factor generic_cpu_reset() out

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main_cpu_reset() is misleadingly named "main": it resets
all vCPUs, with a special case for the first vCPU.

Factor generic_cpu_reset() out of main_cpu_reset(),
allowing to remove one &first_cpu use.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250115232952.31166-2-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2025-01-12 21:05:46 +01:00
parent dc21331e67
commit 6286423b8b
1 changed files with 17 additions and 9 deletions
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26
hw/mips/loongson3_virt.c
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@ -399,25 +399,33 @@ static uint64_t load_kernel(CPUMIPSState *env)
return kernel_entry;
}
static void main_cpu_reset(void *opaque)
static void generic_cpu_reset(void *opaque)
{
MIPSCPU *cpu = opaque;
CPUMIPSState *env = &cpu->env;
cpu_reset(CPU(cpu));
/* Loongson-3 reset stuff */
if (loaderparams.kernel_filename) {
if (cpu == MIPS_CPU(first_cpu)) {
env->active_tc.gpr[4] = loaderparams.a0;
env->active_tc.gpr[5] = loaderparams.a1;
env->active_tc.gpr[6] = loaderparams.a2;
env->active_tc.PC = loaderparams.kernel_entry;
}
env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
}
}
static void main_cpu_reset(void *opaque)
{
generic_cpu_reset(opaque);
if (loaderparams.kernel_filename) {
MIPSCPU *cpu = opaque;
CPUMIPSState *env = &cpu->env;
env->active_tc.gpr[4] = loaderparams.a0;
env->active_tc.gpr[5] = loaderparams.a1;
env->active_tc.gpr[6] = loaderparams.a2;
env->active_tc.PC = loaderparams.kernel_entry;
}
}
static inline void loongson3_virt_devices_init(MachineState *machine,
DeviceState *pic)
{
@ -572,7 +580,7 @@ static void mips_loongson3_virt_init(MachineState *machine)
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
cpu_mips_clock_init(cpu);
qemu_register_reset(main_cpu_reset, cpu);
qemu_register_reset(i ? generic_cpu_reset : main_cpu_reset, cpu);
if (!kvm_enabled()) {
hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base;