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QOM infrastructure fixes and device conversions

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* QTest cleanups and test cases for PCI NICs
 * NAND fix for "info qtree"
 * Cleanup and extension of QOM machine tests
 * IndustryPack test cases and conversion to QOM realize
 * I2C cleanups
 * Cleanups of legacy qdev properties
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Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' into staging

QOM infrastructure fixes and device conversions

* QTest cleanups and test cases for PCI NICs
* NAND fix for "info qtree"
* Cleanup and extension of QOM machine tests
* IndustryPack test cases and conversion to QOM realize
* I2C cleanups
* Cleanups of legacy qdev properties

# gpg: Signature made Mon 17 Feb 2014 22:15:37 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg:                 aka "Andreas Färber <afaerber@suse.com>"

* remotes/afaerber/tags/qom-devices-for-peter: (49 commits)
  qtest: Include system headers before user headers
  qapi: Refine human printing of sizes
  qdev: Use QAPI type names for properties
  qdev: Add enum property types to QAPI schema
  block: Handle "rechs" and "large" translation options
  qdev: Remove hex8/32/64 property types
  qdev: Remove most legacy printers
  qdev: Use human mode in "info qtree"
  qapi: Add human mode to StringOutputVisitor
  qdev: Inline qdev_prop_parse()
  qdev: Legacy properties are just strings
  qdev: Legacy properties are now read-only
  qdev: Remove legacy parsers for hex8/32/64
  qdev: Sizes are now parsed by StringInputVisitor
  qapi: Add size parser to StringInputVisitor
  qtest: Don't segfault with invalid -qtest option
  ipack: Move IndustryPack out of hw/char/
  ipoctal232: QOM parent field cleanup
  ipack: QOM parent field cleanup for IPackDevice
  ipack: QOM parent field cleanup for IPackBus
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2014-02-20 13:05:47 +00:00
commit 61e8a92364
124 changed files with 1049 additions and 865 deletions
Download patch file Download diff file Expand all files Collapse all files

2
include/hw/arm/exynos4210.h
View file

@ -97,7 +97,7 @@ typedef struct Exynos4210State {
MemoryRegion dram1_mem;
MemoryRegion boot_secondary;
MemoryRegion bootreg_mem;
i2c_bus *i2c_if[EXYNOS4210_I2C_NUMBER];
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
} Exynos4210State;
void exynos4210_write_secondary(ARMCPU *cpu,

2
include/hw/arm/omap.h
View file

@ -765,7 +765,7 @@ void omap_mmc_handlers(struct omap_mmc_s *s, qemu_irq ro, qemu_irq cover);
void omap_mmc_enable(struct omap_mmc_s *s, int enable);
/* omap_i2c.c */
i2c_bus *omap_i2c_bus(DeviceState *omap_i2c);
I2CBus *omap_i2c_bus(DeviceState *omap_i2c);
# define cpu_is_omap310(cpu) (cpu->mpu_model == omap310)
# define cpu_is_omap1510(cpu) (cpu->mpu_model == omap1510)

2
include/hw/arm/pxa.h
View file

@ -116,7 +116,7 @@ void pxa27x_register_keypad(PXA2xxKeyPadState *kp,
typedef struct PXA2xxI2CState PXA2xxI2CState;
PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
qemu_irq irq, uint32_t page_size);
i2c_bus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
I2CBus *pxa2xx_i2c_bus(PXA2xxI2CState *s);
typedef struct PXA2xxI2SState PXA2xxI2SState;
typedef struct PXA2xxFIrState PXA2xxFIrState;

6
include/hw/block/block.h
View file

@ -65,12 +65,6 @@ int blkconf_geometry(BlockConf *conf, int *trans,
/* Hard disk geometry */
#define BIOS_ATA_TRANSLATION_AUTO 0
#define BIOS_ATA_TRANSLATION_NONE 1
#define BIOS_ATA_TRANSLATION_LBA 2
#define BIOS_ATA_TRANSLATION_LARGE 3
#define BIOS_ATA_TRANSLATION_RECHS 4
void hd_geometry_guess(BlockDriverState *bs,
uint32_t *pcyls, uint32_t *pheads, uint32_t *psecs,
int *ptrans);

18
include/hw/i2c/i2c.h
View file

@ -50,18 +50,16 @@ struct I2CSlave
uint8_t address;
};
i2c_bus *i2c_init_bus(DeviceState *parent, const char *name);
I2CBus *i2c_init_bus(DeviceState *parent, const char *name);
void i2c_set_slave_address(I2CSlave *dev, uint8_t address);
int i2c_bus_busy(i2c_bus *bus);
int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv);
void i2c_end_transfer(i2c_bus *bus);
void i2c_nack(i2c_bus *bus);
int i2c_send(i2c_bus *bus, uint8_t data);
int i2c_recv(i2c_bus *bus);
int i2c_bus_busy(I2CBus *bus);
int i2c_start_transfer(I2CBus *bus, uint8_t address, int recv);
void i2c_end_transfer(I2CBus *bus);
void i2c_nack(I2CBus *bus);
int i2c_send(I2CBus *bus, uint8_t data);
int i2c_recv(I2CBus *bus);
#define FROM_I2C_SLAVE(type, dev) DO_UPCAST(type, i2c, dev)
DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr);
DeviceState *i2c_create_slave(I2CBus *bus, const char *name, uint8_t addr);
/* wm8750.c */
void wm8750_data_req_set(DeviceState *dev,

2
include/hw/i2c/pm_smbus.h
View file

@ -2,7 +2,7 @@
#define PM_SMBUS_H
typedef struct PMSMBus {
i2c_bus *smbus;
I2CBus *smbus;
MemoryRegion io;
uint8_t smb_stat;

20
include/hw/i2c/smbus.h
View file

@ -66,18 +66,18 @@ struct SMBusDevice {
};
/* Master device commands. */
void smbus_quick_command(i2c_bus *bus, uint8_t addr, int read);
uint8_t smbus_receive_byte(i2c_bus *bus, uint8_t addr);
void smbus_send_byte(i2c_bus *bus, uint8_t addr, uint8_t data);
uint8_t smbus_read_byte(i2c_bus *bus, uint8_t addr, uint8_t command);
void smbus_write_byte(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t data);
uint16_t smbus_read_word(i2c_bus *bus, uint8_t addr, uint8_t command);
void smbus_write_word(i2c_bus *bus, uint8_t addr, uint8_t command, uint16_t data);
int smbus_read_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data);
void smbus_write_block(i2c_bus *bus, uint8_t addr, uint8_t command, uint8_t *data,
void smbus_quick_command(I2CBus *bus, uint8_t addr, int read);
uint8_t smbus_receive_byte(I2CBus *bus, uint8_t addr);
void smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data);
uint8_t smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command);
void smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data);
uint16_t smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command);
void smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data);
int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data);
void smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
int len);
void smbus_eeprom_init(i2c_bus *smbus, int nb_eeprom,
void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom,
const uint8_t *eeprom_spd, int size);
#endif

2
include/hw/i386/ich9.h
View file

@ -20,7 +20,7 @@ int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin);
void ich9_lpc_pm_init(PCIDevice *pci_lpc);
PCIBus *ich9_d2pbr_init(PCIBus *bus, int devfn, int sec_bus);
i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
#define ICH9_CC_SIZE (16 * 1024) /* 16KB */

6
include/hw/i386/pc.h
View file

@ -165,9 +165,9 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
/* acpi_piix.c */
i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int kvm_enabled, FWCfgState *fw_cfg);
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int kvm_enabled, FWCfgState *fw_cfg);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
/* hpet.c */

87
include/hw/ipack/ipack.h Normal file
View file

@ -0,0 +1,87 @@
/*
* QEMU IndustryPack emulation
*
* Copyright (C) 2012 Igalia, S.L.
* Author: Alberto Garcia <agarcia@igalia.com>
*
* This code is licensed under the GNU GPL v2 or (at your option) any
* later version.
*/
#ifndef QEMU_IPACK_H
#define QEMU_IPACK_H
#include "hw/qdev.h"
typedef struct IPackBus IPackBus;
#define TYPE_IPACK_BUS "IndustryPack"
#define IPACK_BUS(obj) OBJECT_CHECK(IPackBus, (obj), TYPE_IPACK_BUS)
struct IPackBus {
/*< private >*/
BusState parent_obj;
/* All fields are private */
uint8_t n_slots;
uint8_t free_slot;
qemu_irq_handler set_irq;
};
typedef struct IPackDevice IPackDevice;
typedef struct IPackDeviceClass IPackDeviceClass;
#define TYPE_IPACK_DEVICE "ipack-device"
#define IPACK_DEVICE(obj) \
OBJECT_CHECK(IPackDevice, (obj), TYPE_IPACK_DEVICE)
#define IPACK_DEVICE_CLASS(klass) \
OBJECT_CLASS_CHECK(IPackDeviceClass, (klass), TYPE_IPACK_DEVICE)
#define IPACK_DEVICE_GET_CLASS(obj) \
OBJECT_GET_CLASS(IPackDeviceClass, (obj), TYPE_IPACK_DEVICE)
struct IPackDeviceClass {
/*< private >*/
DeviceClass parent_class;
/*< public >*/
DeviceRealize realize;
DeviceUnrealize unrealize;
uint16_t (*io_read)(IPackDevice *dev, uint8_t addr);
void (*io_write)(IPackDevice *dev, uint8_t addr, uint16_t val);
uint16_t (*id_read)(IPackDevice *dev, uint8_t addr);
void (*id_write)(IPackDevice *dev, uint8_t addr, uint16_t val);
uint16_t (*int_read)(IPackDevice *dev, uint8_t addr);
void (*int_write)(IPackDevice *dev, uint8_t addr, uint16_t val);
uint16_t (*mem_read16)(IPackDevice *dev, uint32_t addr);
void (*mem_write16)(IPackDevice *dev, uint32_t addr, uint16_t val);
uint8_t (*mem_read8)(IPackDevice *dev, uint32_t addr);
void (*mem_write8)(IPackDevice *dev, uint32_t addr, uint8_t val);
};
struct IPackDevice {
/*< private >*/
DeviceState parent_obj;
/*< public >*/
int32_t slot;
/* IRQ objects for the IndustryPack INT0# and INT1# */
qemu_irq *irq;
};
extern const VMStateDescription vmstate_ipack_device;
#define VMSTATE_IPACK_DEVICE(_field, _state) \
VMSTATE_STRUCT(_field, _state, 1, vmstate_ipack_device, IPackDevice)
IPackDevice *ipack_device_find(IPackBus *bus, int32_t slot);
void ipack_bus_new_inplace(IPackBus *bus, size_t bus_size,
DeviceState *parent,
const char *name, uint8_t n_slots,
qemu_irq_handler handler);
#endif

4
include/hw/isa/vt82c686.h
View file

@ -5,7 +5,7 @@
ISABus *vt82c686b_init(PCIBus * bus, int devfn);
void vt82c686b_ac97_init(PCIBus *bus, int devfn);
void vt82c686b_mc97_init(PCIBus *bus, int devfn);
i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq);
I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq);
#endif

1
include/hw/qdev-core.h
View file

@ -217,7 +217,6 @@ struct PropertyInfo {
const char *name;
const char *legacy_name;
const char **enum_table;
int (*parse)(DeviceState *dev, Property *prop, const char *str);
int (*print)(DeviceState *dev, Property *prop, char *dest, size_t len);
ObjectPropertyAccessor *get;
ObjectPropertyAccessor *set;

2
include/hw/qdev-dma.h
View file

@ -7,4 +7,4 @@
* See the COPYING file in the top-level directory.
*/
#define DEFINE_PROP_DMAADDR(_n, _s, _f, _d) \
DEFINE_PROP_HEX64(_n, _s, _f, _d)
DEFINE_PROP_UINT64(_n, _s, _f, _d)

11
include/hw/qdev-properties.h
View file

@ -12,9 +12,6 @@ extern PropertyInfo qdev_prop_uint16;
extern PropertyInfo qdev_prop_uint32;
extern PropertyInfo qdev_prop_int32;
extern PropertyInfo qdev_prop_uint64;
extern PropertyInfo qdev_prop_hex8;
extern PropertyInfo qdev_prop_hex32;
extern PropertyInfo qdev_prop_hex64;
extern PropertyInfo qdev_prop_size;
extern PropertyInfo qdev_prop_string;
extern PropertyInfo qdev_prop_chr;
@ -111,12 +108,6 @@ extern PropertyInfo qdev_prop_arraylen;
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_int32, int32_t)
#define DEFINE_PROP_UINT64(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint64, uint64_t)
#define DEFINE_PROP_HEX8(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex8, uint8_t)
#define DEFINE_PROP_HEX32(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex32, uint32_t)
#define DEFINE_PROP_HEX64(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_hex64, uint64_t)
#define DEFINE_PROP_SIZE(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_size, uint64_t)
#define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \
@ -168,8 +159,6 @@ extern PropertyInfo qdev_prop_arraylen;
/* Set properties between creation and init. */
void *qdev_get_prop_ptr(DeviceState *dev, Property *prop);
void qdev_prop_parse(DeviceState *dev, const char *name, const char *value,
Error **errp);
void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value);
void qdev_prop_set_uint8(DeviceState *dev, const char *name, uint8_t value);
void qdev_prop_set_uint16(DeviceState *dev, const char *name, uint16_t value);