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target/ppc: moved XXSPLTIB to using decodetree

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Changed the function that handles XXSPLTIB emulation to using
decodetree, but still use the same logic as before

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-20-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Bruno Larsen (billionai) 2021-11-04 09:37:13 -03:00 • committed by David Gibson
parent 30dfca8d8f
commit 6166fced10
3 changed files with 11 additions and 15 deletions
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20
target/ppc/translate/vsx-impl.c.inc
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@ -1455,23 +1455,15 @@ static bool trans_XXSPLTW(DisasContext *ctx, arg_XX2 *a)
#define pattern(x) (((x) & 0xff) * (~(uint64_t)0 / 0xff))
static void gen_xxspltib(DisasContext *ctx)
static bool trans_XXSPLTIB(DisasContext *ctx, arg_X_imm8 *a)
{
uint8_t uim8 = IMM8(ctx->opcode);
int rt = xT(ctx->opcode);
if (rt < 32) {
if (unlikely(!ctx->vsx_enabled)) {
gen_exception(ctx, POWERPC_EXCP_VSXU);
return;
}
if (a->xt < 32) {
REQUIRE_VSX(ctx);
} else {
if (unlikely(!ctx->altivec_enabled)) {
gen_exception(ctx, POWERPC_EXCP_VPU);
return;
}
REQUIRE_VECTOR(ctx);
}
tcg_gen_gvec_dup_imm(MO_8, vsr_full_offset(rt), 16, 16, uim8);
tcg_gen_gvec_dup_imm(MO_8, vsr_full_offset(a->xt), 16, 16, a->imm);
return true;
}
static void gen_xxsldwi(DisasContext *ctx)