hw/ide: Extract bmdma_status_writeb()

Every TYPE_PCI_IDE device performs the same not-so-trivial bit manipulation by
copy'n'paste code. Extract this into bmdma_status_writeb(), mirroring
bmdma_cmd_writeb().

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20230531211043.41724-6-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Bernhard Beschow 2023-05-31 23:10:41 +02:00 committed by Philippe Mathieu-Daudé
parent bf0576edd7
commit 5fe24213f0
6 changed files with 11 additions and 7 deletions

View file

@ -144,7 +144,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
cmd646_update_irq(pci_dev); cmd646_update_irq(pci_dev);
break; break;
case 2: case 2:
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06); bmdma_status_writeb(bm, val);
break; break;
case 3: case 3:
if (bm == &bm->pci_dev->bmdma[0]) { if (bm == &bm->pci_dev->bmdma[0]) {

View file

@ -318,6 +318,11 @@ void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val)
bm->cmd = val & 0x09; bm->cmd = val & 0x09;
} }
void bmdma_status_writeb(BMDMAState *bm, uint32_t val)
{
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
}
static uint64_t bmdma_addr_read(void *opaque, hwaddr addr, static uint64_t bmdma_addr_read(void *opaque, hwaddr addr,
unsigned width) unsigned width)
{ {

View file

@ -76,7 +76,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
bmdma_cmd_writeb(bm, val); bmdma_cmd_writeb(bm, val);
break; break;
case 2: case 2:
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06); bmdma_status_writeb(bm, val);
break; break;
} }
} }

View file

@ -149,8 +149,7 @@ static void sii3112_reg_write(void *opaque, hwaddr addr,
break; break;
case 0x02: case 0x02:
case 0x12: case 0x12:
d->i.bmdma[0].status = (val & 0x60) | (d->i.bmdma[0].status & 1) | bmdma_status_writeb(&d->i.bmdma[0], val);
(d->i.bmdma[0].status & ~val & 6);
break; break;
case 0x04 ... 0x07: case 0x04 ... 0x07:
bmdma_addr_ioport_ops.write(&d->i.bmdma[0], addr - 4, val, size); bmdma_addr_ioport_ops.write(&d->i.bmdma[0], addr - 4, val, size);
@ -165,8 +164,7 @@ static void sii3112_reg_write(void *opaque, hwaddr addr,
break; break;
case 0x0a: case 0x0a:
case 0x1a: case 0x1a:
d->i.bmdma[1].status = (val & 0x60) | (d->i.bmdma[1].status & 1) | bmdma_status_writeb(&d->i.bmdma[1], val);
(d->i.bmdma[1].status & ~val & 6);
break; break;
case 0x0c ... 0x0f: case 0x0c ... 0x0f:
bmdma_addr_ioport_ops.write(&d->i.bmdma[1], addr - 12, val, size); bmdma_addr_ioport_ops.write(&d->i.bmdma[1], addr - 12, val, size);

View file

@ -75,7 +75,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
bmdma_cmd_writeb(bm, val); bmdma_cmd_writeb(bm, val);
break; break;
case 2: case 2:
bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06); bmdma_status_writeb(bm, val);
break; break;
default:; default:;
} }

View file

@ -58,6 +58,7 @@ struct PCIIDEState {
void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d); void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val); void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
void bmdma_status_writeb(BMDMAState *bm, uint32_t val);
extern MemoryRegionOps bmdma_addr_ioport_ops; extern MemoryRegionOps bmdma_addr_ioport_ops;
void pci_ide_create_devs(PCIDevice *dev); void pci_ide_create_devs(PCIDevice *dev);