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include/hw/qdev-properties: Remove DEFINE_PROP_END_OF_LIST

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Now that all of the Property arrays are counted, we can remove
the terminator object from each array.  Update the assertions
in device_class_set_props to match.

With struct Property being 88 bytes, this was a rather large
form of terminator.  Saves 30k from qemu-system-aarch64.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Lei Yang <leiyang@redhat.com>
Link: https://lore.kernel.org/r/20241218134251.4724-21-richard.henderson@linaro.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Richard Henderson 2024-12-18 07:42:47 -06:00 • committed by Paolo Bonzini
parent ebe9685f12
commit 5fcabe628b
556 changed files with 7 additions and 624 deletions
Download patch file Download diff file Expand all files Collapse all files

1
hw/pci-bridge/cxl_downstream.c
View file

@ -217,7 +217,6 @@ static const Property cxl_dsp_props[] = {
speed, PCIE_LINK_SPEED_64),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
width, PCIE_LINK_WIDTH_16),
DEFINE_PROP_END_OF_LIST()
};
static void cxl_dsp_class_init(ObjectClass *oc, void *data)

1
hw/pci-bridge/cxl_root_port.c
View file

@ -211,7 +211,6 @@ static const Property gen_rp_props[] = {
speed, PCIE_LINK_SPEED_64),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
width, PCIE_LINK_WIDTH_32),
DEFINE_PROP_END_OF_LIST()
};
static void cxl_rp_dvsec_write_config(PCIDevice *dev, uint32_t addr,

1
hw/pci-bridge/cxl_upstream.c
View file

@ -369,7 +369,6 @@ static const Property cxl_upstream_props[] = {
speed, PCIE_LINK_SPEED_32),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", CXLUpstreamPort,
width, PCIE_LINK_WIDTH_16),
DEFINE_PROP_END_OF_LIST()
};
static void cxl_upstream_class_init(ObjectClass *oc, void *data)

1
hw/pci-bridge/gen_pcie_root_port.c
View file

@ -145,7 +145,6 @@ static const Property gen_rp_props[] = {
speed, PCIE_LINK_SPEED_16),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
width, PCIE_LINK_WIDTH_32),
DEFINE_PROP_END_OF_LIST()
};
static void gen_rp_dev_class_init(ObjectClass *klass, void *data)

1
hw/pci-bridge/pci_bridge_dev.c
View file

@ -186,7 +186,6 @@ static const Property pci_bridge_dev_properties[] = {
res_reserve.mem_pref_32, -1),
DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
res_reserve.mem_pref_64, -1),
DEFINE_PROP_END_OF_LIST(),
};
static bool pci_device_shpc_present(void *opaque, int version_id)

2
hw/pci-bridge/pci_expander_bridge.c
View file

@ -425,7 +425,6 @@ static const Property pxb_dev_properties[] = {
DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
DEFINE_PROP_END_OF_LIST(),
};
static void pxb_dev_class_init(ObjectClass *klass, void *data)
@ -509,7 +508,6 @@ static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp)
static const Property pxb_cxl_dev_properties[] = {
DEFINE_PROP_BOOL("hdm_for_passthrough", PXBCXLDev, hdm_for_passthrough, false),
DEFINE_PROP_END_OF_LIST(),
};
static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)

1
hw/pci-bridge/pcie_pci_bridge.c
View file

@ -126,7 +126,6 @@ static void pcie_pci_bridge_write_config(PCIDevice *d,
static const Property pcie_pci_bridge_dev_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_AUTO),
DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription pcie_pci_bridge_dev_vmstate = {

1
hw/pci-bridge/pcie_root_port.c
View file

@ -152,7 +152,6 @@ static const Property rp_props[] = {
DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
QEMU_PCIE_SLTCAP_PCP_BITNR, true),
DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false),
DEFINE_PROP_END_OF_LIST()
};
static void rp_instance_post_init(Object *obj)

1
hw/pci-bridge/xio3130_downstream.c
View file

@ -137,7 +137,6 @@ static void xio3130_downstream_exitfn(PCIDevice *d)
static const Property xio3130_downstream_props[] = {
DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
QEMU_PCIE_SLTCAP_PCP_BITNR, true),
DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription vmstate_xio3130_downstream = {