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semihosting/arm-compat: replace heuristic for softmmu SYS_HEAPINFO

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The previous numbers were a guess at best and rather arbitrary without
taking into account anything that might be loaded. Instead of using
guesses based on the state of registers implement a new function that:

 a) scans the MemoryRegions for the largest RAM block
 b) iterates through all "ROM" blobs looking for the biggest gap

The "ROM" blobs include all code loaded via -kernel and the various
-device loader techniques.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Andrew Strauss <astrauss11@gmail.com>
Cc: Keith Packard <keithp@keithp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220225172021.3493923-18-alex.bennee@linaro.org>
This commit is contained in:
Alex Bennée 2022-02-25 17:20:20 +00:00
parent 04e90c1313
commit 5fc983af8b
3 changed files with 163 additions and 61 deletions
Download patch file Download diff file Expand all files Collapse all files

124
semihosting/arm-compat-semi.c
View file

@ -44,6 +44,7 @@
#define COMMON_SEMI_HEAP_SIZE (128 * 1024 * 1024)
#else
#include "qemu/cutils.h"
#include "hw/loader.h"
#ifdef TARGET_ARM
#include "hw/arm/boot.h"
#endif
@ -144,33 +145,69 @@ typedef struct GuestFD {
static GArray *guestfd_array;
#ifndef CONFIG_USER_ONLY
#include "exec/address-spaces.h"
/*
* Find the base of a RAM region containing the specified address
/**
* common_semi_find_bases: find information about ram and heap base
*
* This function attempts to provide meaningful numbers for RAM and
* HEAP base addresses. The rambase is simply the lowest addressable
* RAM position. For the heapbase we ask the loader to scan the
* address space and the largest available gap by querying the "ROM"
* regions.
*
* Returns: a structure with the numbers we need.
*/
static inline hwaddr
common_semi_find_region_base(hwaddr addr)
typedef struct LayoutInfo {
target_ulong rambase;
size_t ramsize;
hwaddr heapbase;
hwaddr heaplimit;
} LayoutInfo;
static bool find_ram_cb(Int128 start, Int128 len, const MemoryRegion *mr,
hwaddr offset_in_region, void *opaque)
{
MemoryRegion *subregion;
LayoutInfo *info = (LayoutInfo *) opaque;
uint64_t size = int128_get64(len);
if (!mr->ram || mr->readonly) {
return false;
}
if (size > info->ramsize) {
info->rambase = int128_get64(start);
info->ramsize = size;
}
/* search exhaustively for largest RAM */
return false;
}
static LayoutInfo common_semi_find_bases(CPUState *cs)
{
FlatView *fv;
LayoutInfo info = { 0, 0, 0, 0 };
RCU_READ_LOCK_GUARD();
fv = address_space_to_flatview(cs->as);
flatview_for_each_range(fv, find_ram_cb, &info);
/*
* Find the chunk of R/W memory containing the address. This is
* used for the SYS_HEAPINFO semihosting call, which should
* probably be using information from the loaded application.
* If we have found the RAM lets iterate through the ROM blobs to
* work out the best place for the remainder of RAM and split it
* equally between stack and heap.
*/
QTAILQ_FOREACH(subregion, &get_system_memory()->subregions,
subregions_link) {
if (subregion->ram && !subregion->readonly) {
Int128 top128 = int128_add(int128_make64(subregion->addr),
subregion->size);
Int128 addr128 = int128_make64(addr);
if (subregion->addr <= addr && int128_lt(addr128, top128)) {
return subregion->addr;
}
}
if (info.rambase || info.ramsize > 0) {
RomGap gap = rom_find_largest_gap_between(info.rambase, info.ramsize);
info.heapbase = gap.base;
info.heaplimit = gap.base + gap.size;
}
return 0;
return info;
}
#endif
#ifdef TARGET_ARM
@ -204,28 +241,6 @@ common_semi_sys_exit_extended(CPUState *cs, int nr)
return (nr == TARGET_SYS_EXIT_EXTENDED || is_a64(cs->env_ptr));
}
#ifndef CONFIG_USER_ONLY
#include "hw/arm/boot.h"
static inline target_ulong
common_semi_rambase(CPUState *cs)
{
CPUArchState *env = cs->env_ptr;
const struct arm_boot_info *info = env->boot_info;
target_ulong sp;
if (info) {
return info->loader_start;
}
if (is_a64(env)) {
sp = env->xregs[31];
} else {
sp = env->regs[13];
}
return common_semi_find_region_base(sp);
}
#endif
#endif /* TARGET_ARM */
#ifdef TARGET_RISCV
@ -251,17 +266,6 @@ common_semi_sys_exit_extended(CPUState *cs, int nr)
return (nr == TARGET_SYS_EXIT_EXTENDED || sizeof(target_ulong) == 8);
}
#ifndef CONFIG_USER_ONLY
static inline target_ulong
common_semi_rambase(CPUState *cs)
{
RISCVCPU *cpu = RISCV_CPU(cs);
CPURISCVState *env = &cpu->env;
return common_semi_find_region_base(env->gpr[xSP]);
}
#endif
#endif
/*
@ -1165,12 +1169,12 @@ target_ulong do_common_semihosting(CPUState *cs)
case TARGET_SYS_HEAPINFO:
{
target_ulong retvals[4];
target_ulong limit;
int i;
#ifdef CONFIG_USER_ONLY
TaskState *ts = cs->opaque;
target_ulong limit;
#else
target_ulong rambase = common_semi_rambase(cs);
LayoutInfo info = common_semi_find_bases(cs);
#endif
GET_ARG(0);
@ -1201,12 +1205,10 @@ target_ulong do_common_semihosting(CPUState *cs)
retvals[2] = ts->stack_base;
retvals[3] = 0; /* Stack limit. */
#else
limit = current_machine->ram_size;
/* TODO: Make this use the limit of the loaded application. */
retvals[0] = rambase + limit / 2;
retvals[1] = rambase + limit;
retvals[2] = rambase + limit; /* Stack base */
retvals[3] = rambase; /* Stack limit. */
retvals[0] = info.heapbase; /* Heap Base */
retvals[1] = info.heaplimit; /* Heap Limit */
retvals[2] = info.heaplimit; /* Stack base */
retvals[3] = info.heapbase; /* Stack limit. */
#endif
for (i = 0; i < ARRAY_SIZE(retvals); i++) {