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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths
parent
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327 changed files with 4737 additions and 4738 deletions
52
hw/rtl8139.c
52
hw/rtl8139.c
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@ -1,8 +1,8 @@
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/**
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* QEMU RTL8139 emulation
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*
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*
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* Copyright (c) 2006 Igor Kovalenko
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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@ -20,13 +20,13 @@
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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* Modifications:
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* 2006-Jan-28 Mark Malakanov : TSAD and CSCR implementation (for Windows driver)
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*
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*
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* 2006-Apr-28 Juergen Lock : EEPROM emulation changes for FreeBSD driver
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* HW revision ID changes for FreeBSD driver
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*
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*
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* 2006-Jul-01 Igor Kovalenko : Implemented loopback mode for FreeBSD driver
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* Corrected packet transfer reassembly routine for 8139C+ mode
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* Rearranged debugging print statements
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@ -305,11 +305,11 @@ enum CSCRBits {
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CSCR_LinkDownCmd = 0x0f3c0,
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*/
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enum CSCRBits {
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CSCR_Testfun = 1<<15, /* 1 = Auto-neg speeds up internal timer, WO, def 0 */
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CSCR_Testfun = 1<<15, /* 1 = Auto-neg speeds up internal timer, WO, def 0 */
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CSCR_LD = 1<<9, /* Active low TPI link disable signal. When low, TPI still transmits link pulses and TPI stays in good link state. def 1*/
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CSCR_HEART_BIT = 1<<8, /* 1 = HEART BEAT enable, 0 = HEART BEAT disable. HEART BEAT function is only valid in 10Mbps mode. def 1*/
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CSCR_JBEN = 1<<7, /* 1 = enable jabber function. 0 = disable jabber function, def 1*/
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CSCR_F_LINK_100 = 1<<6, /* Used to login force good link in 100Mbps for diagnostic purposes. 1 = DISABLE, 0 = ENABLE. def 1*/
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CSCR_F_LINK_100 = 1<<6, /* Used to login force good link in 100Mbps for diagnostic purposes. 1 = DISABLE, 0 = ENABLE. def 1*/
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CSCR_F_Connect = 1<<5, /* Assertion of this bit forces the disconnect function to be bypassed. def 0*/
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CSCR_Con_status = 1<<3, /* This bit indicates the status of the connection. 1 = valid connected link detected; 0 = disconnected link detected. RO def 0*/
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CSCR_Con_status_En = 1<<2, /* Assertion of this bit configures LED1 pin to indicate connection status. def 0*/
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@ -813,7 +813,7 @@ static void rtl8139_do_receive(void *opaque, const uint8_t *buf, int size, int d
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uint32_t packet_header = 0;
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uint8_t buf1[60];
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static const uint8_t broadcast_macaddr[6] =
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static const uint8_t broadcast_macaddr[6] =
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{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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DEBUG_PRINT((">>> RTL8139: received len=%d\n", size));
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@ -890,10 +890,10 @@ static void rtl8139_do_receive(void *opaque, const uint8_t *buf, int size, int d
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++s->tally_counters.RxOkMul;
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} else if (s->phys[0] == buf[0] &&
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s->phys[1] == buf[1] &&
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s->phys[2] == buf[2] &&
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s->phys[3] == buf[3] &&
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s->phys[4] == buf[4] &&
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s->phys[1] == buf[1] &&
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s->phys[2] == buf[2] &&
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s->phys[3] == buf[3] &&
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s->phys[4] == buf[4] &&
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s->phys[5] == buf[5]) {
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/* match */
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if (!(s->RxConfig & AcceptMyPhys))
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@ -1225,7 +1225,7 @@ static void rtl8139_reset(RTL8139State *s)
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s->Config3 = 0x1; /* fast back-to-back compatible */
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s->Config5 = 0x0;
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s->CSCR = CSCR_F_LINK_100 | CSCR_HEART_BIT | CSCR_LD;
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s->CSCR = CSCR_F_LINK_100 | CSCR_HEART_BIT | CSCR_LD;
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s->CpCmd = 0x0; /* reset C+ mode */
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@ -2420,17 +2420,17 @@ static uint16_t rtl8139_TSAD_read(RTL8139State *s)
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|((s->TxStatus[2] & TxUnderrun)?TSAD_TUN2:0)
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|((s->TxStatus[1] & TxUnderrun)?TSAD_TUN1:0)
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|((s->TxStatus[0] & TxUnderrun)?TSAD_TUN0:0)
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|((s->TxStatus[3] & TxAborted )?TSAD_TABT3:0)
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|((s->TxStatus[2] & TxAborted )?TSAD_TABT2:0)
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|((s->TxStatus[1] & TxAborted )?TSAD_TABT1:0)
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|((s->TxStatus[0] & TxAborted )?TSAD_TABT0:0)
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|((s->TxStatus[3] & TxHostOwns )?TSAD_OWN3:0)
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|((s->TxStatus[2] & TxHostOwns )?TSAD_OWN2:0)
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|((s->TxStatus[1] & TxHostOwns )?TSAD_OWN1:0)
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|((s->TxStatus[0] & TxHostOwns )?TSAD_OWN0:0) ;
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DEBUG_PRINT(("RTL8139: TSAD read val=0x%04x\n", ret));
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@ -3315,7 +3315,7 @@ typedef struct PCIRTL8139State {
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RTL8139State rtl8139;
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} PCIRTL8139State;
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static void rtl8139_mmio_map(PCIDevice *pci_dev, int region_num,
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static void rtl8139_mmio_map(PCIDevice *pci_dev, int region_num,
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uint32_t addr, uint32_t size, int type)
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{
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PCIRTL8139State *d = (PCIRTL8139State *)pci_dev;
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@ -3324,7 +3324,7 @@ static void rtl8139_mmio_map(PCIDevice *pci_dev, int region_num,
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cpu_register_physical_memory(addr + 0, 0x100, s->rtl8139_mmio_io_addr);
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}
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static void rtl8139_ioport_map(PCIDevice *pci_dev, int region_num,
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static void rtl8139_ioport_map(PCIDevice *pci_dev, int region_num,
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uint32_t addr, uint32_t size, int type)
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{
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PCIRTL8139State *d = (PCIRTL8139State *)pci_dev;
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@ -3354,7 +3354,7 @@ static CPUWriteMemoryFunc *rtl8139_mmio_write[3] = {
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static inline int64_t rtl8139_get_next_tctr_time(RTL8139State *s, int64_t current_time)
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{
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int64_t next_time = current_time +
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int64_t next_time = current_time +
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muldiv64(1, ticks_per_sec, PCI_FREQUENCY);
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if (next_time <= current_time)
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next_time = current_time + 1;
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@ -3400,7 +3400,7 @@ static void rtl8139_timer(void *opaque)
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rtl8139_update_irq(s);
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}
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qemu_mod_timer(s->timer,
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qemu_mod_timer(s->timer,
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rtl8139_get_next_tctr_time(s,curr_time));
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}
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#endif /* RTL8139_ONBOARD_TIMER */
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@ -3410,10 +3410,10 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn)
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PCIRTL8139State *d;
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RTL8139State *s;
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uint8_t *pci_conf;
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d = (PCIRTL8139State *)pci_register_device(bus,
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"RTL8139", sizeof(PCIRTL8139State),
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devfn,
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devfn,
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NULL, NULL);
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pci_conf = d->dev.config;
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pci_conf[0x00] = 0xec; /* Realtek 8139 */
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@ -3434,10 +3434,10 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn)
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s->rtl8139_mmio_io_addr =
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cpu_register_io_memory(0, rtl8139_mmio_read, rtl8139_mmio_write, s);
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pci_register_io_region(&d->dev, 0, 0x100,
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pci_register_io_region(&d->dev, 0, 0x100,
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PCI_ADDRESS_SPACE_IO, rtl8139_ioport_map);
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pci_register_io_region(&d->dev, 1, 0x100,
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pci_register_io_region(&d->dev, 1, 0x100,
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PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map);
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s->pci_dev = (PCIDevice *)d;
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@ -3458,14 +3458,14 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn)
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s->cplus_txbuffer = NULL;
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s->cplus_txbuffer_len = 0;
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s->cplus_txbuffer_offset = 0;
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/* XXX: instance number ? */
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register_savevm("rtl8139", 0, 3, rtl8139_save, rtl8139_load, s);
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#if RTL8139_ONBOARD_TIMER
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s->timer = qemu_new_timer(vm_clock, rtl8139_timer, s);
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qemu_mod_timer(s->timer,
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qemu_mod_timer(s->timer,
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rtl8139_get_next_tctr_time(s,qemu_get_clock(vm_clock)));
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#endif /* RTL8139_ONBOARD_TIMER */
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}
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