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find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
bd494f4cbd
commit
5fafdf24ef
327 changed files with 4737 additions and 4738 deletions
42
hw/pci.c
42
hw/pci.c
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@ -2,7 +2,7 @@
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* QEMU PCI bus manager
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*
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* Copyright (c) 2004 Fabrice Bellard
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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@ -96,16 +96,16 @@ int pci_device_load(PCIDevice *s, QEMUFile *f)
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}
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/* -1 for devfn means auto assign */
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PCIDevice *pci_register_device(PCIBus *bus, const char *name,
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PCIDevice *pci_register_device(PCIBus *bus, const char *name,
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int instance_size, int devfn,
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PCIConfigReadFunc *config_read,
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PCIConfigReadFunc *config_read,
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PCIConfigWriteFunc *config_write)
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{
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PCIDevice *pci_dev;
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if (pci_irq_index >= PCI_DEVICES_MAX)
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return NULL;
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if (devfn < 0) {
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for(devfn = bus->devfn_min ; devfn < 256; devfn += 8) {
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if (!bus->devices[devfn])
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@ -134,8 +134,8 @@ PCIDevice *pci_register_device(PCIBus *bus, const char *name,
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return pci_dev;
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}
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void pci_register_io_region(PCIDevice *pci_dev, int region_num,
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uint32_t size, int type,
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void pci_register_io_region(PCIDevice *pci_dev, int region_num,
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uint32_t size, int type,
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PCIMapIORegionFunc *map_func)
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{
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PCIIORegion *r;
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@ -166,7 +166,7 @@ static void pci_update_mappings(PCIDevice *d)
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PCIIORegion *r;
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int cmd, i;
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uint32_t last_addr, new_addr, config_ofs;
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cmd = le16_to_cpu(*(uint16_t *)(d->config + PCI_COMMAND));
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for(i = 0; i < PCI_NUM_REGIONS; i++) {
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r = &d->io_regions[i];
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@ -178,7 +178,7 @@ static void pci_update_mappings(PCIDevice *d)
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if (r->size != 0) {
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if (r->type & PCI_ADDRESS_SPACE_IO) {
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if (cmd & PCI_COMMAND_IO) {
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new_addr = le32_to_cpu(*(uint32_t *)(d->config +
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new_addr = le32_to_cpu(*(uint32_t *)(d->config +
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config_ofs));
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new_addr = new_addr & ~(r->size - 1);
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last_addr = new_addr + r->size - 1;
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@ -192,7 +192,7 @@ static void pci_update_mappings(PCIDevice *d)
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}
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} else {
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if (cmd & PCI_COMMAND_MEMORY) {
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new_addr = le32_to_cpu(*(uint32_t *)(d->config +
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new_addr = le32_to_cpu(*(uint32_t *)(d->config +
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config_ofs));
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/* the ROM slot has a specific enable bit */
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if (i == PCI_ROM_SLOT && !(new_addr & 1))
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@ -227,7 +227,7 @@ static void pci_update_mappings(PCIDevice *d)
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}
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} else {
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cpu_register_physical_memory(pci_to_cpu_addr(r->addr),
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r->size,
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r->size,
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IO_MEM_UNASSIGNED);
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}
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}
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@ -240,7 +240,7 @@ static void pci_update_mappings(PCIDevice *d)
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}
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}
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uint32_t pci_default_read_config(PCIDevice *d,
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uint32_t pci_default_read_config(PCIDevice *d,
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uint32_t address, int len)
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{
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uint32_t val;
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@ -266,13 +266,13 @@ uint32_t pci_default_read_config(PCIDevice *d,
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return val;
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}
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void pci_default_write_config(PCIDevice *d,
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void pci_default_write_config(PCIDevice *d,
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uint32_t address, uint32_t val, int len)
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{
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int can_write, i;
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uint32_t end, addr;
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if (len == 4 && ((address >= 0x10 && address < 0x10 + 4 * 6) ||
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if (len == 4 && ((address >= 0x10 && address < 0x10 + 4 * 6) ||
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(address >= 0x30 && address < 0x34))) {
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PCIIORegion *r;
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int reg;
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@ -367,7 +367,7 @@ void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len)
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PCIBus *s = opaque;
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PCIDevice *pci_dev;
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int config_addr, bus_num;
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#if defined(DEBUG_PCI) && 0
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printf("pci_data_write: addr=%08x val=%08x len=%d\n",
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addr, val, len);
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@ -440,7 +440,7 @@ static void pci_set_irq(void *opaque, int irq_num, int level)
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PCIDevice *pci_dev = (PCIDevice *)opaque;
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PCIBus *bus;
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int change;
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change = level - pci_dev->irq_state[irq_num];
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if (!change)
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return;
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@ -465,7 +465,7 @@ typedef struct {
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const char *desc;
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} pci_class_desc;
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static pci_class_desc pci_class_descriptions[] =
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static pci_class_desc pci_class_descriptions[] =
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{
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{ 0x0100, "SCSI controller"},
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{ 0x0101, "IDE controller"},
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@ -538,10 +538,10 @@ static void pci_info_device(PCIDevice *d)
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if (r->size != 0) {
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term_printf(" BAR%d: ", i);
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if (r->type & PCI_ADDRESS_SPACE_IO) {
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term_printf("I/O at 0x%04x [0x%04x].\n",
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term_printf("I/O at 0x%04x [0x%04x].\n",
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r->addr, r->addr + r->size - 1);
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} else {
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term_printf("32 bit memory at 0x%08x [0x%08x].\n",
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term_printf("32 bit memory at 0x%08x [0x%08x].\n",
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r->addr, r->addr + r->size - 1);
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}
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}
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@ -556,7 +556,7 @@ void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d))
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PCIBus *bus = first_bus;
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PCIDevice *d;
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int devfn;
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while (bus && bus->bus_num != bus_num)
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bus = bus->next;
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if (bus) {
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@ -603,7 +603,7 @@ typedef struct {
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PCIBus *bus;
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} PCIBridge;
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void pci_bridge_write_config(PCIDevice *d,
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void pci_bridge_write_config(PCIDevice *d,
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uint32_t address, uint32_t val, int len)
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{
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PCIBridge *s = (PCIBridge *)d;
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pci_map_irq_fn map_irq, const char *name)
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{
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PCIBridge *s;
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s = (PCIBridge *)pci_register_device(bus, name, sizeof(PCIBridge),
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s = (PCIBridge *)pci_register_device(bus, name, sizeof(PCIBridge),
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devfn, NULL, pci_bridge_write_config);
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s->dev.config[0x00] = id >> 16;
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s->dev.config[0x01] = id >> 24;
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