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target/riscv: convert THead C906 to RISCVCPUDef
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
1016b0364f
commit
5f687d77ff
1 changed files with 28 additions and 33 deletions
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@ -499,38 +499,6 @@ static void riscv_register_custom_csrs(RISCVCPU *cpu, const RISCVCSR *csr_list)
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#endif
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#if defined(TARGET_RISCV64)
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static void rv64_thead_c906_cpu_init(Object *obj)
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{
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CPURISCVState *env = &RISCV_CPU(obj)->env;
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RISCVCPU *cpu = RISCV_CPU(obj);
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riscv_cpu_set_misa_ext(env, RVG | RVC | RVS | RVU);
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env->priv_ver = PRIV_VERSION_1_11_0;
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cpu->cfg.ext_zfa = true;
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cpu->cfg.ext_zfh = true;
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cpu->cfg.mmu = true;
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cpu->cfg.ext_xtheadba = true;
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cpu->cfg.ext_xtheadbb = true;
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cpu->cfg.ext_xtheadbs = true;
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cpu->cfg.ext_xtheadcmo = true;
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cpu->cfg.ext_xtheadcondmov = true;
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cpu->cfg.ext_xtheadfmemidx = true;
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cpu->cfg.ext_xtheadmac = true;
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cpu->cfg.ext_xtheadmemidx = true;
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cpu->cfg.ext_xtheadmempair = true;
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cpu->cfg.ext_xtheadsync = true;
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cpu->cfg.mvendorid = THEAD_VENDOR_ID;
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#ifndef CONFIG_USER_ONLY
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set_satp_mode_max_supported(cpu, VM_1_10_SV39);
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riscv_register_custom_csrs(cpu, th_csr_list);
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#endif
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/* inherited from parent obj via riscv_cpu_init() */
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cpu->cfg.pmp = true;
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}
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static void rv64_veyron_v1_cpu_init(Object *obj)
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{
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CPURISCVState *env = &RISCV_CPU(obj)->env;
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@ -3217,7 +3185,34 @@ static const TypeInfo riscv_cpu_type_infos[] = {
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.misa_mxl_max = MXL_RV64,
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),
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DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_THEAD_C906, MXL_RV64, rv64_thead_c906_cpu_init),
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DEFINE_RISCV_CPU(TYPE_RISCV_CPU_THEAD_C906, TYPE_RISCV_VENDOR_CPU,
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.misa_mxl_max = MXL_RV64,
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.misa_ext = RVG | RVC | RVS | RVU,
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.priv_spec = PRIV_VERSION_1_11_0,
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.cfg.ext_zfa = true,
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.cfg.ext_zfh = true,
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.cfg.mmu = true,
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.cfg.ext_xtheadba = true,
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.cfg.ext_xtheadbb = true,
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.cfg.ext_xtheadbs = true,
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.cfg.ext_xtheadcmo = true,
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.cfg.ext_xtheadcondmov = true,
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.cfg.ext_xtheadfmemidx = true,
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.cfg.ext_xtheadmac = true,
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.cfg.ext_xtheadmemidx = true,
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.cfg.ext_xtheadmempair = true,
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.cfg.ext_xtheadsync = true,
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.cfg.pmp = true,
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.cfg.mvendorid = THEAD_VENDOR_ID,
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.cfg.max_satp_mode = VM_1_10_SV39,
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#ifndef CONFIG_USER_ONLY
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.custom_csrs = th_csr_list,
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#endif
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),
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DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_TT_ASCALON, MXL_RV64, rv64_tt_ascalon_cpu_init),
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DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_VEYRON_V1, MXL_RV64, rv64_veyron_v1_cpu_init),
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DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_XIANGSHAN_NANHU,
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