motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-08 10:13:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

ppc: spapr: Enable 2nd DAWR on Power10 pSeries machine

Browse source 
As per the PAPR, bit 0 of byte 64 in pa-features property
indicates availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to find
whether kvm supports 2nd DAWR or not. If it's supported, allow user to set
the pa-feature bit in guest DT using cap-dawr1 machine capability.

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Message-ID: <173708681866.1678.11128625982438367069.stgit@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
Shivaprasad G Bhat 2025-01-17 04:07:01 +00:00 • committed by Nicholas Piggin
parent 7ea6e12529
commit 5f361ea187
6 changed files with 96 additions and 11 deletions
Download patch file Download diff file Expand all files Collapse all files

27
hw/ppc/spapr_hcall.c
View file

@ -822,11 +822,12 @@ static target_ulong h_set_mode_resource_set_ciabr(PowerPCCPU *cpu,
return H_SUCCESS;
}
static target_ulong h_set_mode_resource_set_dawr0(PowerPCCPU *cpu,
SpaprMachineState *spapr,
target_ulong mflags,
target_ulong value1,
target_ulong value2)
static target_ulong h_set_mode_resource_set_dawr(PowerPCCPU *cpu,
SpaprMachineState *spapr,
target_ulong mflags,
target_ulong resource,
target_ulong value1,
target_ulong value2)
{
CPUPPCState *env = &cpu->env;
@ -839,8 +840,15 @@ static target_ulong h_set_mode_resource_set_dawr0(PowerPCCPU *cpu,
return H_P4;
}
ppc_store_dawr0(env, value1);
ppc_store_dawrx0(env, value2);
if (resource == H_SET_MODE_RESOURCE_SET_DAWR0) {
ppc_store_dawr0(env, value1);
ppc_store_dawrx0(env, value2);
} else if (resource == H_SET_MODE_RESOURCE_SET_DAWR1) {
ppc_store_dawr1(env, value1);
ppc_store_dawrx1(env, value2);
} else {
g_assert_not_reached();
}
return H_SUCCESS;
}
@ -919,8 +927,9 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, SpaprMachineState *spapr,
args[3]);
break;
case H_SET_MODE_RESOURCE_SET_DAWR0:
ret = h_set_mode_resource_set_dawr0(cpu, spapr, args[0], args[2],
args[3]);
case H_SET_MODE_RESOURCE_SET_DAWR1:
ret = h_set_mode_resource_set_dawr(cpu, spapr, args[0], args[1],
args[2], args[3]);
break;
case H_SET_MODE_RESOURCE_LE:
ret = h_set_mode_resource_le(cpu, spapr, args[0], args[2], args[3]);