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target/arm: Pass CPUARMState to arm_ld[lq]_ptw

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The use of ARM_CPU to recover env from cs calls
object_class_dynamic_cast, which shows up on the profile.
This is pointless, because all callers already have env, and
the reverse operation, env_cpu, is only pointer arithmetic.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220604040607.269301-29-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-08 19:38:54 +01:00 • committed by Peter Maydell
parent 1d26125536
commit 5e79887ba6
1 changed files with 9 additions and 14 deletions
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23
target/arm/ptw.c
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@ -241,11 +241,10 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx,
} }
/* All loads done in the course of a page table walk go through here. */ /* All loads done in the course of a page table walk go through here. */
static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure, static uint32_t arm_ldl_ptw(CPUARMState *env, hwaddr addr, bool is_secure,
ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi)
{ {
ARMCPU *cpu = ARM_CPU(cs); CPUState *cs = env_cpu(env);
CPUARMState *env = &cpu->env;
MemTxAttrs attrs = {}; MemTxAttrs attrs = {};
MemTxResult result = MEMTX_OK; MemTxResult result = MEMTX_OK;
AddressSpace *as; AddressSpace *as;
@ -270,11 +269,10 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
return 0; return 0;
} }
static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure, static uint64_t arm_ldq_ptw(CPUARMState *env, hwaddr addr, bool is_secure,
ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi)
{ {
ARMCPU *cpu = ARM_CPU(cs); CPUState *cs = env_cpu(env);
CPUARMState *env = &cpu->env;
MemTxAttrs attrs = {}; MemTxAttrs attrs = {};
MemTxResult result = MEMTX_OK; MemTxResult result = MEMTX_OK;
AddressSpace *as; AddressSpace *as;
@ -409,7 +407,6 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
target_ulong *page_size, target_ulong *page_size,
ARMMMUFaultInfo *fi) ARMMMUFaultInfo *fi)
{ {
CPUState *cs = env_cpu(env);
int level = 1; int level = 1;
uint32_t table; uint32_t table;
uint32_t desc; uint32_t desc;
@ -427,7 +424,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
fi->type = ARMFault_Translation; fi->type = ARMFault_Translation;
goto do_fault; goto do_fault;
} }
desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
mmu_idx, fi); mmu_idx, fi);
if (fi->type != ARMFault_None) { if (fi->type != ARMFault_None) {
goto do_fault; goto do_fault;
@ -466,7 +463,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
/* Fine pagetable. */ /* Fine pagetable. */
table = (desc & 0xfffff000) | ((address >> 8) & 0xffc); table = (desc & 0xfffff000) | ((address >> 8) & 0xffc);
} }
desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
mmu_idx, fi); mmu_idx, fi);
if (fi->type != ARMFault_None) { if (fi->type != ARMFault_None) {
goto do_fault; goto do_fault;
@ -531,7 +528,6 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
target_ulong *page_size, ARMMMUFaultInfo *fi) target_ulong *page_size, ARMMMUFaultInfo *fi)
{ {
CPUState *cs = env_cpu(env);
ARMCPU *cpu = env_archcpu(env); ARMCPU *cpu = env_archcpu(env);
int level = 1; int level = 1;
uint32_t table; uint32_t table;
@ -553,7 +549,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
fi->type = ARMFault_Translation; fi->type = ARMFault_Translation;
goto do_fault; goto do_fault;
} }
desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
mmu_idx, fi); mmu_idx, fi);
if (fi->type != ARMFault_None) { if (fi->type != ARMFault_None) {
goto do_fault; goto do_fault;
@ -607,7 +603,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32_t address,
ns = extract32(desc, 3, 1); ns = extract32(desc, 3, 1);
/* Lookup l2 entry. */ /* Lookup l2 entry. */
table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc);
desc = arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), desc = arm_ldl_ptw(env, table, regime_is_secure(env, mmu_idx),
mmu_idx, fi); mmu_idx, fi);
if (fi->type != ARMFault_None) { if (fi->type != ARMFault_None) {
goto do_fault; goto do_fault;
@ -973,7 +969,6 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs) ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)
{ {
ARMCPU *cpu = env_archcpu(env); ARMCPU *cpu = env_archcpu(env);
CPUState *cs = CPU(cpu);
/* Read an LPAE long-descriptor translation table. */ /* Read an LPAE long-descriptor translation table. */
ARMFaultType fault_type = ARMFault_Translation; ARMFaultType fault_type = ARMFault_Translation;
uint32_t level; uint32_t level;
@ -1196,7 +1191,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
descaddr |= (address >> (stride * (4 - level))) & indexmask; descaddr |= (address >> (stride * (4 - level))) & indexmask;
descaddr &= ~7ULL; descaddr &= ~7ULL;
nstable = extract32(tableattrs, 4, 1); nstable = extract32(tableattrs, 4, 1);
descriptor = arm_ldq_ptw(cs, descaddr, !nstable, mmu_idx, fi); descriptor = arm_ldq_ptw(env, descaddr, !nstable, mmu_idx, fi);
if (fi->type != ARMFault_None) { if (fi->type != ARMFault_None) {
goto do_fault; goto do_fault;
} }