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acpi: cpuhp: add CPU devices AML with _STA method
it adds CPU objects to DSDT with _STA method and QEMU side of CPU hotplug interface initialization with registers sufficient to handle _STA requests, including necessary hotplug callbacks in piix4,ich9 code. Hot-(un)plug hw/acpi parts will be added by corresponding follow up patches. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov
Michael S. Tsirkin
parent
16bcab97eb
commit
5e1b5d9388
7 changed files with 313 additions and 6 deletions
240
hw/acpi/cpu.c
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240
hw/acpi/cpu.c
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#include "qemu/osdep.h"
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#include "hw/boards.h"
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#include "hw/acpi/cpu.h"
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#include "qapi/error.h"
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#include "trace.h"
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#define ACPI_CPU_HOTPLUG_REG_LEN 12
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#define ACPI_CPU_SELECTOR_OFFSET_WR 0
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#define ACPI_CPU_FLAGS_OFFSET_RW 4
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static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
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{
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uint64_t val = 0;
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CPUHotplugState *cpu_st = opaque;
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AcpiCpuStatus *cdev;
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if (cpu_st->selector >= cpu_st->dev_count) {
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return val;
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}
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cdev = &cpu_st->devs[cpu_st->selector];
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switch (addr) {
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case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
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val |= cdev->cpu ? 1 : 0;
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trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
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break;
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default:
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break;
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}
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return val;
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}
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static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
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unsigned int size)
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{
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CPUHotplugState *cpu_st = opaque;
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assert(cpu_st->dev_count);
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if (addr) {
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if (cpu_st->selector >= cpu_st->dev_count) {
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trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
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return;
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}
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}
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switch (addr) {
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case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
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cpu_st->selector = data;
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trace_cpuhp_acpi_write_idx(cpu_st->selector);
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break;
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default:
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break;
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}
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}
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static const MemoryRegionOps cpu_hotplug_ops = {
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.read = cpu_hotplug_rd,
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.write = cpu_hotplug_wr,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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};
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void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
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CPUHotplugState *state, hwaddr base_addr)
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{
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MachineState *machine = MACHINE(qdev_get_machine());
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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CPUArchIdList *id_list;
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int i;
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assert(mc->possible_cpu_arch_ids);
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id_list = mc->possible_cpu_arch_ids(machine);
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state->dev_count = id_list->len;
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state->devs = g_new0(typeof(*state->devs), state->dev_count);
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for (i = 0; i < id_list->len; i++) {
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state->devs[i].cpu = id_list->cpus[i].cpu;
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state->devs[i].arch_id = id_list->cpus[i].arch_id;
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}
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g_free(id_list);
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memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
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"acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
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memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
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}
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static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
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{
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CPUClass *k = CPU_GET_CLASS(dev);
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uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
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int i;
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for (i = 0; i < cpu_st->dev_count; i++) {
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if (cpu_arch_id == cpu_st->devs[i].arch_id) {
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return &cpu_st->devs[i];
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}
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}
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return NULL;
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}
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void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
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CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
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{
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AcpiCpuStatus *cdev;
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cdev = get_cpu_status(cpu_st, dev);
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if (!cdev) {
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return;
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}
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cdev->cpu = CPU(dev);
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}
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const VMStateDescription vmstate_cpu_hotplug = {
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.name = "CPU hotplug state",
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.version_id = 1,
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT32(selector, CPUHotplugState),
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VMSTATE_END_OF_LIST()
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}
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};
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#define CPU_NAME_FMT "C%.03X"
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#define CPUHP_RES_DEVICE "PRES"
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#define CPU_LOCK "CPLK"
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#define CPU_STS_METHOD "CSTA"
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#define CPU_ENABLED "CPEN"
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#define CPU_SELECTOR "CSEL"
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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hwaddr io_base,
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const char *res_root)
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{
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Aml *ifctx;
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Aml *field;
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Aml *method;
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Aml *cpu_ctrl_dev;
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Aml *cpus_dev;
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Aml *zero = aml_int(0);
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Aml *one = aml_int(1);
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Aml *sb_scope = aml_scope("_SB");
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
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char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
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cpu_ctrl_dev = aml_device("%s", cphp_res_path);
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{
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Aml *crs;
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aml_append(cpu_ctrl_dev,
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aml_name_decl("_HID", aml_eisaid("PNP0A06")));
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aml_append(cpu_ctrl_dev,
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aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
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aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
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crs = aml_resource_template();
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aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
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ACPI_CPU_HOTPLUG_REG_LEN));
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aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
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/* declare CPU hotplug MMIO region with related access fields */
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aml_append(cpu_ctrl_dev,
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aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
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ACPI_CPU_HOTPLUG_REG_LEN));
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field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
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AML_WRITE_AS_ZEROS);
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aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
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/* 1 if enabled, read only */
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aml_append(field, aml_named_field(CPU_ENABLED, 1));
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aml_append(cpu_ctrl_dev, field);
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field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
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/* CPU selector, write only */
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aml_append(field, aml_named_field(CPU_SELECTOR, 32));
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aml_append(cpu_ctrl_dev, field);
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}
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aml_append(sb_scope, cpu_ctrl_dev);
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cpus_dev = aml_device("\\_SB.CPUS");
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{
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int i;
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Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
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Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
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Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
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aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
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aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
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method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
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{
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Aml *idx = aml_arg(0);
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Aml *sta = aml_local(0);
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aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
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aml_append(method, aml_store(idx, cpu_selector));
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aml_append(method, aml_store(zero, sta));
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ifctx = aml_if(aml_equal(is_enabled, one));
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{
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aml_append(ifctx, aml_store(aml_int(0xF), sta));
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}
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aml_append(method, ifctx);
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aml_append(method, aml_release(ctrl_lock));
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aml_append(method, aml_return(sta));
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}
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aml_append(cpus_dev, method);
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/* build Processor object for each processor */
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for (i = 0; i < arch_ids->len; i++) {
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Aml *dev;
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Aml *uid = aml_int(i);
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int arch_id = arch_ids->cpus[i].arch_id;
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if (opts.apci_1_compatible && arch_id < 255) {
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dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
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} else {
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dev = aml_device(CPU_NAME_FMT, i);
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aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
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aml_append(dev, aml_name_decl("_UID", uid));
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}
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method = aml_method("_STA", 0, AML_SERIALIZED);
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aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
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aml_append(dev, method);
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aml_append(cpus_dev, dev);
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}
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}
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aml_append(sb_scope, cpus_dev);
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aml_append(table, sb_scope);
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g_free(cphp_res_path);
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g_free(arch_ids);
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}
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