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https://github.com/Motorhead1991/qemu.git
synced 2025-08-04 16:23:55 -06:00
Scrap SIGN_EXTEND32.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
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parent
c570fd169c
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5dc4b74480
6 changed files with 79 additions and 78 deletions
102
target-mips/op.c
102
target-mips/op.c
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@ -328,7 +328,7 @@ void op_store_LO (void)
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/* Arithmetic */
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void op_add (void)
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{
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T0 = SIGN_EXTEND32((int32_t)T0 + (int32_t)T1);
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T0 = (int32_t)((int32_t)T0 + (int32_t)T1);
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RETURN();
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}
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@ -342,13 +342,13 @@ void op_addo (void)
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/* operands of same sign, result different sign */
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CALL_FROM_TB1(do_raise_exception_direct, EXCP_OVERFLOW);
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}
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T0 = SIGN_EXTEND32(T0);
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T0 = (int32_t)T0;
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RETURN();
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}
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void op_sub (void)
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{
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T0 = SIGN_EXTEND32((int32_t)T0 - (int32_t)T1);
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T0 = (int32_t)((int32_t)T0 - (int32_t)T1);
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RETURN();
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}
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@ -362,21 +362,21 @@ void op_subo (void)
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/* operands of different sign, first operand and result different sign */
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CALL_FROM_TB1(do_raise_exception_direct, EXCP_OVERFLOW);
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}
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T0 = SIGN_EXTEND32(T0);
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T0 = (int32_t)T0;
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RETURN();
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}
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void op_mul (void)
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{
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T0 = SIGN_EXTEND32((int32_t)T0 * (int32_t)T1);
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T0 = (int32_t)((int32_t)T0 * (int32_t)T1);
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RETURN();
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}
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void op_div (void)
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{
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if (T1 != 0) {
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env->LO = SIGN_EXTEND32((int32_t)T0 / (int32_t)T1);
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env->HI = SIGN_EXTEND32((int32_t)T0 % (int32_t)T1);
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env->LO = (int32_t)((int32_t)T0 / (int32_t)T1);
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env->HI = (int32_t)((int32_t)T0 % (int32_t)T1);
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}
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RETURN();
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}
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@ -384,8 +384,8 @@ void op_div (void)
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void op_divu (void)
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{
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if (T1 != 0) {
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env->LO = SIGN_EXTEND32((uint32_t)T0 / (uint32_t)T1);
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env->HI = SIGN_EXTEND32((uint32_t)T0 % (uint32_t)T1);
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env->LO = (int32_t)((uint32_t)T0 / (uint32_t)T1);
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env->HI = (int32_t)((uint32_t)T0 % (uint32_t)T1);
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}
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RETURN();
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}
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@ -497,19 +497,19 @@ void op_xor (void)
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void op_sll (void)
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{
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T0 = SIGN_EXTEND32((uint32_t)T0 << (uint32_t)T1);
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T0 = (int32_t)((uint32_t)T0 << (uint32_t)T1);
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RETURN();
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}
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void op_sra (void)
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{
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T0 = SIGN_EXTEND32((int32_t)T0 >> (uint32_t)T1);
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T0 = (int32_t)((int32_t)T0 >> (uint32_t)T1);
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RETURN();
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}
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void op_srl (void)
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{
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T0 = SIGN_EXTEND32((uint32_t)T0 >> (uint32_t)T1);
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T0 = (int32_t)((uint32_t)T0 >> (uint32_t)T1);
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RETURN();
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}
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@ -518,8 +518,8 @@ void op_rotr (void)
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target_ulong tmp;
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if (T1) {
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tmp = SIGN_EXTEND32((uint32_t)T0 << (0x20 - (uint32_t)T1));
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T0 = SIGN_EXTEND32((uint32_t)T0 >> (uint32_t)T1) | tmp;
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tmp = (int32_t)((uint32_t)T0 << (0x20 - (uint32_t)T1));
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T0 = (int32_t)((uint32_t)T0 >> (uint32_t)T1) | tmp;
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} else
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T0 = T1;
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RETURN();
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@ -527,19 +527,19 @@ void op_rotr (void)
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void op_sllv (void)
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{
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T0 = SIGN_EXTEND32((uint32_t)T1 << ((uint32_t)T0 & 0x1F));
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T0 = (int32_t)((uint32_t)T1 << ((uint32_t)T0 & 0x1F));
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RETURN();
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}
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void op_srav (void)
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{
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T0 = SIGN_EXTEND32((int32_t)T1 >> (T0 & 0x1F));
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T0 = (int32_t)((int32_t)T1 >> (T0 & 0x1F));
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RETURN();
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}
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void op_srlv (void)
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{
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T0 = SIGN_EXTEND32((uint32_t)T1 >> (T0 & 0x1F));
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T0 = (int32_t)((uint32_t)T1 >> (T0 & 0x1F));
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RETURN();
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}
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@ -549,8 +549,8 @@ void op_rotrv (void)
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T0 &= 0x1F;
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if (T0) {
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tmp = SIGN_EXTEND32((uint32_t)T1 << (0x20 - T0));
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T0 = SIGN_EXTEND32((uint32_t)T1 >> T0) | tmp;
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tmp = (int32_t)((uint32_t)T1 << (0x20 - T0));
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T0 = (int32_t)((uint32_t)T1 >> T0) | tmp;
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} else
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T0 = T1;
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RETURN();
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@ -842,8 +842,8 @@ static inline uint64_t get_HILO (void)
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static inline void set_HILO (uint64_t HILO)
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{
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env->LO = SIGN_EXTEND32(HILO & 0xFFFFFFFF);
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env->HI = SIGN_EXTEND32(HILO >> 32);
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env->LO = (int32_t)(HILO & 0xFFFFFFFF);
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env->HI = (int32_t)(HILO >> 32);
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}
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void op_mult (void)
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@ -1032,7 +1032,7 @@ void op_jnz_T2 (void)
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/* CP0 functions */
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void op_mfc0_index (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_index);
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T0 = (int32_t)(env->CP0_index);
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RETURN();
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}
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@ -1062,25 +1062,25 @@ void op_mfc0_context (void)
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void op_mfc0_pagemask (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_PageMask);
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T0 = (int32_t)env->CP0_PageMask;
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RETURN();
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}
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void op_mfc0_pagegrain (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_PageGrain);
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T0 = (int32_t)env->CP0_PageGrain;
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RETURN();
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}
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void op_mfc0_wired (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Wired);
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T0 = (int32_t)env->CP0_Wired;
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RETURN();
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}
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void op_mfc0_hwrena (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_HWREna);
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T0 = (int32_t)env->CP0_HWREna;
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RETURN();
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}
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@ -1104,13 +1104,13 @@ void op_mfc0_entryhi (void)
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void op_mfc0_compare (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Compare);
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T0 = (int32_t)env->CP0_Compare;
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RETURN();
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}
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void op_mfc0_status (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Status);
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T0 = (int32_t)env->CP0_Status;
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if (env->hflags & MIPS_HFLAG_UM)
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T0 |= (1 << CP0St_UM);
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if (env->hflags & MIPS_HFLAG_ERL)
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@ -1122,19 +1122,19 @@ void op_mfc0_status (void)
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void op_mfc0_intctl (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_IntCtl);
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T0 = (int32_t)env->CP0_IntCtl;
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RETURN();
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}
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void op_mfc0_srsctl (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_SRSCtl);
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T0 = (int32_t)env->CP0_SRSCtl;
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RETURN();
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}
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void op_mfc0_cause (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Cause);
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T0 = (int32_t)env->CP0_Cause;
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RETURN();
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}
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@ -1146,7 +1146,7 @@ void op_mfc0_epc (void)
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void op_mfc0_prid (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_PRid);
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T0 = (int32_t)env->CP0_PRid;
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RETURN();
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}
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@ -1158,25 +1158,25 @@ void op_mfc0_ebase (void)
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void op_mfc0_config0 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Config0);
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T0 = (int32_t)env->CP0_Config0;
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RETURN();
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}
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void op_mfc0_config1 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Config1);
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T0 = (int32_t)env->CP0_Config1;
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RETURN();
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}
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void op_mfc0_config2 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Config2);
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T0 = (int32_t)env->CP0_Config2;
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RETURN();
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}
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void op_mfc0_config3 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Config3);
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T0 = (int32_t)env->CP0_Config3;
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RETURN();
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}
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@ -1188,13 +1188,13 @@ void op_mfc0_lladdr (void)
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void op_mfc0_watchlo0 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_WatchLo);
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T0 = (int32_t)env->CP0_WatchLo;
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RETURN();
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}
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void op_mfc0_watchhi0 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_WatchHi);
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T0 = (int32_t)env->CP0_WatchHi;
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RETURN();
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}
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@ -1212,7 +1212,7 @@ void op_mfc0_framemask (void)
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void op_mfc0_debug (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Debug);
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T0 = (int32_t)env->CP0_Debug;
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if (env->hflags & MIPS_HFLAG_DM)
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T0 |= 1 << CP0DB_DM;
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RETURN();
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@ -1226,31 +1226,31 @@ void op_mfc0_depc (void)
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void op_mfc0_performance0 (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_Performance0);
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T0 = (int32_t)env->CP0_Performance0;
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RETURN();
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}
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void op_mfc0_taglo (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_TagLo);
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T0 = (int32_t)env->CP0_TagLo;
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RETURN();
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}
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void op_mfc0_datalo (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_DataLo);
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T0 = (int32_t)env->CP0_DataLo;
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RETURN();
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}
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void op_mfc0_taghi (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_TagHi);
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T0 = (int32_t)env->CP0_TagHi;
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RETURN();
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}
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void op_mfc0_datahi (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_DataHi);
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T0 = (int32_t)env->CP0_DataHi;
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RETURN();
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}
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@ -1262,7 +1262,7 @@ void op_mfc0_errorepc (void)
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void op_mfc0_desave (void)
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{
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T0 = SIGN_EXTEND32(env->CP0_DESAVE);
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T0 = (int32_t)env->CP0_DESAVE;
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RETURN();
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}
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@ -1276,7 +1276,7 @@ void op_mtc0_entrylo0 (void)
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{
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/* Large physaddr not implemented */
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/* 1k pages not implemented */
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env->CP0_EntryLo0 = T0 & SIGN_EXTEND32(0x3FFFFFFFUL);
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env->CP0_EntryLo0 = T0 & (int32_t)0x3FFFFFFF;
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RETURN();
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}
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@ -1284,7 +1284,7 @@ void op_mtc0_entrylo1 (void)
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{
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/* Large physaddr not implemented */
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/* 1k pages not implemented */
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env->CP0_EntryLo1 = T0 & SIGN_EXTEND32(0x3FFFFFFFUL);
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env->CP0_EntryLo1 = T0 & (int32_t)0x3FFFFFFF;
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RETURN();
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}
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@ -1334,7 +1334,7 @@ void op_mtc0_entryhi (void)
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/* 1k pages not implemented */
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/* Ignore MIPS64 TLB for now */
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val = T0 & SIGN_EXTEND32(0xFFFFE0FF);
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val = T0 & (int32_t)0xFFFFE0FF;
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old = env->CP0_EntryHi;
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env->CP0_EntryHi = val;
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/* If the ASID changes, flush qemu's TLB. */
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@ -1353,7 +1353,7 @@ void op_mtc0_status (void)
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{
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uint32_t val, old, mask;
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val = T0 & SIGN_EXTEND32(0xFA78FF01);
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val = T0 & (int32_t)0xFA78FF01;
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old = env->CP0_Status;
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if (T0 & (1 << CP0St_UM))
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env->hflags |= MIPS_HFLAG_UM;
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@ -1431,7 +1431,7 @@ void op_mtc0_ebase (void)
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{
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/* vectored interrupts not implemented */
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/* Multi-CPU not implemented */
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env->CP0_EBase = SIGN_EXTEND32(0x80000000) | (T0 & 0x3FFFF000);
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env->CP0_EBase = (int32_t)0x80000000 | (T0 & 0x3FFFF000);
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RETURN();
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}
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@ -1501,7 +1501,7 @@ void op_mtc0_performance0 (void)
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void op_mtc0_taglo (void)
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{
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env->CP0_TagLo = T0 & SIGN_EXTEND32(0xFFFFFCF6);
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env->CP0_TagLo = T0 & (int32_t)0xFFFFFCF6;
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RETURN();
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}
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