motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 00:03:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

Constify almost all struct Property

Browse source 
-----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmdfJ5wdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9KYAf+Lu4rFaJ99LVVDPXJ
 A3e9eIciGS1qS8RYACiaMZvpteYJeSPJriPSw7d5LY0H6rr7Az3dRVX5x3xI5C3u
 tz7VvNu8agxkCqab6k5xWH1FyNaFi+3u8Yqnbtm5fcAEkf6QdbEPONEZbKeGQuDH
 bxQ3EJvj+fmc5/Fdcp/SoFnDNcM65PVgi5PUKiAFEE1dxvtUfYQx5DjokyehyhsS
 4O6UEcLWOW+50CYy7X256ifSPaDz6HXBIIJVgCk9+347mKOLsZ3HbNalxXLdj+N0
 a148b+7ans8A88NZ6m5bezhlj0x9lEuK+6AocZmntYuFqOYcJVuzC40dEd9mj93J
 8W8E7A==
 =EA7k
 -----END PGP SIGNATURE-----

Merge tag 'pull-prop-20241215' of https://gitlab.com/rth7680/qemu into staging

Constify almost all struct Property

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmdfJ5wdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9KYAf+Lu4rFaJ99LVVDPXJ
# A3e9eIciGS1qS8RYACiaMZvpteYJeSPJriPSw7d5LY0H6rr7Az3dRVX5x3xI5C3u
# tz7VvNu8agxkCqab6k5xWH1FyNaFi+3u8Yqnbtm5fcAEkf6QdbEPONEZbKeGQuDH
# bxQ3EJvj+fmc5/Fdcp/SoFnDNcM65PVgi5PUKiAFEE1dxvtUfYQx5DjokyehyhsS
# 4O6UEcLWOW+50CYy7X256ifSPaDz6HXBIIJVgCk9+347mKOLsZ3HbNalxXLdj+N0
# a148b+7ans8A88NZ6m5bezhlj0x9lEuK+6AocZmntYuFqOYcJVuzC40dEd9mj93J
# 8W8E7A==
# =EA7k
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 15 Dec 2024 14:01:48 EST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-prop-20241215' of https://gitlab.com/rth7680/qemu: (67 commits)
  docs: Constify all Property in examples
  tests/unit: Constify all Property
  hw/xen: Constify all Property
  hw/watchdog: Constify all Property
  hw/virtio: Constify all Property
  hw/vfio: Constify all Property
  hw/usb: Constify all Property
  hw/ufs: Constify all Property
  hw/tpm: Constify all Property
  hw/timer: Constify all Property
  hw/ssi: Constify all Property
  hw/sparc64: Constify all Property
  hw/sparc: Constify all Property
  hw/sd: Constify all Property
  hw/scsi: Constify all Property
  hw/s390x: Constify all Property
  hw/rx: Constify all Property
  hw/rtc: Constify all Property
  hw/riscv: Constify all Property
  hw/remote: Constify all Property
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2024-12-16 09:35:34 -05:00
commit 5d4d26254b
558 changed files with 633 additions and 633 deletions
Download patch file Download diff file Expand all files Collapse all files

2
cpu-target.c
View file

@ -183,7 +183,7 @@ void cpu_exec_unrealizefn(CPUState *cpu)
* This can't go in hw/core/cpu.c because that file is compiled only
* once for both user-mode and system builds.
*/
static Property cpu_common_props[] = {
static const Property cpu_common_props[] = {
#ifdef CONFIG_USER_ONLY
/*
* Create a property for the user-only object, so users can

4
docs/devel/migration/compatibility.rst
View file

@ -198,7 +198,7 @@ was done::
The relevant parts for migration are::
@@ -1281,7 +1284,8 @@ static Property virtio_blk_properties[] = {
@@ -1281,7 +1284,8 @@ static const Property virtio_blk_properties[] = {
#endif
DEFINE_PROP_BIT("request-merging", VirtIOBlock, conf.request_merging, 0,
true),
@ -395,7 +395,7 @@ the old behaviour or the new behaviour::
index 8a87ccc8b0..5153ad63d6 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -79,6 +79,8 @@ static Property pci_props[] = {
@@ -79,6 +79,8 @@ static const Property pci_props[] = {
DEFINE_PROP_STRING("failover_pair_id", PCIDevice,
failover_pair_id),
DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0),

2
docs/devel/virtio-backends.rst
View file

@ -101,7 +101,7 @@ manually instantiated:
VirtIOBlock vdev;
};
static Property virtio_blk_pci_properties[] = {
static const Property virtio_blk_pci_properties[] = {
DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),

2
hw/9pfs/virtio-9p-device.c
View file

@ -243,7 +243,7 @@ static const VMStateDescription vmstate_virtio_9p = {
},
};
static Property virtio_9p_properties[] = {
static const Property virtio_9p_properties[] = {
DEFINE_PROP_STRING("mount_tag", V9fsVirtioState, state.fsconf.tag),
DEFINE_PROP_STRING("fsdev", V9fsVirtioState, state.fsconf.fsdev_id),
DEFINE_PROP_END_OF_LIST(),

2
hw/acpi/erst.c
View file

@ -1011,7 +1011,7 @@ static void erst_reset(DeviceState *dev)
trace_acpi_erst_reset_out(le32_to_cpu(s->header->record_count));
}
static Property erst_properties[] = {
static const Property erst_properties[] = {
DEFINE_PROP_LINK(ACPI_ERST_MEMDEV_PROP, ERSTDeviceState, hostmem,
TYPE_MEMORY_BACKEND, HostMemoryBackend *),
DEFINE_PROP_UINT32(ACPI_ERST_RECORD_SIZE_PROP, ERSTDeviceState,

2
hw/acpi/generic_event_device.c
View file

@ -316,7 +316,7 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
qemu_irq_pulse(s->irq);
}
static Property acpi_ged_properties[] = {
static const Property acpi_ged_properties[] = {
DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/acpi/piix4.c
View file

@ -602,7 +602,7 @@ static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
acpi_send_gpe_event(&s->ar, s->irq, ev);
}
static Property piix4_pm_properties[] = {
static const Property piix4_pm_properties[] = {
DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0),
DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0),
DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0),

2
hw/acpi/vmgenid.c
View file

@ -214,7 +214,7 @@ static void vmgenid_realize(DeviceState *dev, Error **errp)
vmgenid_update_guest(vms);
}
static Property vmgenid_device_properties[] = {
static const Property vmgenid_device_properties[] = {
DEFINE_PROP_UUID(VMGENID_GUID, VmGenIdState, guid),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/adc/aspeed_adc.c
View file

@ -286,7 +286,7 @@ static const VMStateDescription vmstate_aspeed_adc_engine = {
}
};
static Property aspeed_adc_engine_properties[] = {
static const Property aspeed_adc_engine_properties[] = {
DEFINE_PROP_UINT32("engine-id", AspeedADCEngineState, engine_id, 0),
DEFINE_PROP_UINT32("nr-channels", AspeedADCEngineState, nr_channels, 0),
DEFINE_PROP_END_OF_LIST(),

2
hw/adc/npcm7xx_adc.c
View file

@ -267,7 +267,7 @@ static const VMStateDescription vmstate_npcm7xx_adc = {
},
};
static Property npcm7xx_timer_properties[] = {
static const Property npcm7xx_timer_properties[] = {
DEFINE_PROP_UINT32("iref", NPCM7xxADCState, iref, NPCM7XX_ADC_DEFAULT_IREF),
DEFINE_PROP_END_OF_LIST(),
};

8
hw/arm/armsse.c
View file

@ -72,12 +72,12 @@ struct ARMSSEInfo {
bool has_cpu_pwrctrl;
bool has_sse_counter;
bool has_tcms;
Property *props;
const Property *props;
const ARMSSEDeviceInfo *devinfo;
const bool *irq_is_common;
};
static Property iotkit_properties[] = {
static const Property iotkit_properties[] = {
DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
@ -90,7 +90,7 @@ static Property iotkit_properties[] = {
DEFINE_PROP_END_OF_LIST()
};
static Property sse200_properties[] = {
static const Property sse200_properties[] = {
DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),
@ -107,7 +107,7 @@ static Property sse200_properties[] = {
DEFINE_PROP_END_OF_LIST()
};
static Property sse300_properties[] = {
static const Property sse300_properties[] = {
DEFINE_PROP_LINK("memory", ARMSSE, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),

4
hw/arm/armv7m.c
View file

@ -538,7 +538,7 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
}
}
static Property armv7m_properties[] = {
static const Property armv7m_properties[] = {
DEFINE_PROP_STRING("cpu-type", ARMv7MState, cpu_type),
DEFINE_PROP_LINK("memory", ARMv7MState, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
@ -631,7 +631,7 @@ void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename,
qemu_register_reset(armv7m_reset, cpu);
}
static Property bitband_properties[] = {
static const Property bitband_properties[] = {
DEFINE_PROP_UINT32("base", BitBandState, base, 0),
DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
TYPE_MEMORY_REGION, MemoryRegion *),

2
hw/arm/aspeed_soc_common.c
View file

@ -139,7 +139,7 @@ static bool aspeed_soc_boot_from_emmc(AspeedSoCState *s)
return false;
}
static Property aspeed_soc_properties[] = {
static const Property aspeed_soc_properties[] = {
DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_LINK("memory", AspeedSoCState, memory, TYPE_MEMORY_REGION,

2
hw/arm/bcm2836.c
View file

@ -18,7 +18,7 @@
#include "target/arm/cpu-qom.h"
#include "target/arm/gtimer.h"
static Property bcm2836_enabled_cores_property =
static const Property bcm2836_enabled_cores_property =
DEFINE_PROP_UINT32("enabled-cpus", BCM283XBaseState, enabled_cpus, 0);
static void bcm283x_base_init(Object *obj)

2
hw/arm/fsl-imx25.c
View file

@ -309,7 +309,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
&s->iram_alias);
}
static Property fsl_imx25_properties[] = {
static const Property fsl_imx25_properties[] = {
DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/arm/fsl-imx6.c
View file

@ -481,7 +481,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
&s->ocram_alias);
}
static Property fsl_imx6_properties[] = {
static const Property fsl_imx6_properties[] = {
DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/arm/fsl-imx6ul.c
View file

@ -718,7 +718,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_OCRAM_ALIAS_ADDR, &s->ocram_alias);
}
static Property fsl_imx6ul_properties[] = {
static const Property fsl_imx6ul_properties[] = {
DEFINE_PROP_UINT32("fec1-phy-num", FslIMX6ULState, phy_num[0], 0),
DEFINE_PROP_UINT32("fec2-phy-num", FslIMX6ULState, phy_num[1], 1),
DEFINE_PROP_BOOL("fec1-phy-connected", FslIMX6ULState, phy_connected[0],

2
hw/arm/fsl-imx7.c
View file

@ -736,7 +736,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
&s->caam);
}
static Property fsl_imx7_properties[] = {
static const Property fsl_imx7_properties[] = {
DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
DEFINE_PROP_BOOL("fec1-phy-connected", FslIMX7State, phy_connected[0],

2
hw/arm/integratorcp.c
View file

@ -694,7 +694,7 @@ static void integratorcp_machine_init(MachineClass *mc)
DEFINE_MACHINE("integratorcp", integratorcp_machine_init)
static Property core_properties[] = {
static const Property core_properties[] = {
DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/arm/msf2-soc.c
View file

@ -222,7 +222,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
create_unimplemented_device("usb", 0x40043000, 0x1000);
}
static Property m2sxxx_soc_properties[] = {
static const Property m2sxxx_soc_properties[] = {
/*
* part name specifies the type of SmartFusion2 device variant(this
* property is for information purpose only.

2
hw/arm/npcm7xx.c
View file

@ -810,7 +810,7 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("npcm7xx.spix", 0xfb001000, 4 * KiB);
}
static Property npcm7xx_properties[] = {
static const Property npcm7xx_properties[] = {
DEFINE_PROP_LINK("dram-mr", NPCM7xxState, dram, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_END_OF_LIST(),

2
hw/arm/nrf51_soc.c
View file

@ -208,7 +208,7 @@ static void nrf51_soc_init(Object *obj)
s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0);
}
static Property nrf51_soc_properties[] = {
static const Property nrf51_soc_properties[] = {
DEFINE_PROP_LINK("memory", NRF51State, board_memory, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("sram-size", NRF51State, sram_size, NRF51822_SRAM_SIZE),

2
hw/arm/smmu-common.c
View file

@ -934,7 +934,7 @@ static void smmu_base_reset_hold(Object *obj, ResetType type)
g_hash_table_remove_all(s->iotlb);
}
static Property smmu_dev_properties[] = {
static const Property smmu_dev_properties[] = {
DEFINE_PROP_UINT8("bus_num", SMMUState, bus_num, 0),
DEFINE_PROP_LINK("primary-bus", SMMUState, primary_bus,
TYPE_PCI_BUS, PCIBus *),

2
hw/arm/smmuv3.c
View file

@ -1976,7 +1976,7 @@ static const VMStateDescription vmstate_smmuv3 = {
}
};
static Property smmuv3_properties[] = {
static const Property smmuv3_properties[] = {
/*
* Stages of translation advertised.
* "1": Stage 1

2
hw/arm/stellaris.c
View file

@ -438,7 +438,7 @@ static const VMStateDescription vmstate_stellaris_sys = {
}
};
static Property stellaris_sys_properties[] = {
static const Property stellaris_sys_properties[] = {
DEFINE_PROP_UINT32("user0", ssys_state, user0, 0),
DEFINE_PROP_UINT32("user1", ssys_state, user1, 0),
DEFINE_PROP_UINT32("did0", ssys_state, did0, 0),

2
hw/arm/strongarm.c
View file

@ -1332,7 +1332,7 @@ static const VMStateDescription vmstate_strongarm_uart_regs = {
},
};
static Property strongarm_uart_properties[] = {
static const Property strongarm_uart_properties[] = {
DEFINE_PROP_CHR("chardev", StrongARMUARTState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/arm/xlnx-versal.c
View file

@ -968,7 +968,7 @@ static void versal_init(Object *obj)
"mr-rpu-ps-alias", &s->mr_ps, 0, UINT64_MAX);
}
static Property versal_properties[] = {
static const Property versal_properties[] = {
DEFINE_PROP_LINK("ddr", Versal, cfg.mr_ddr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_LINK("canbus0", Versal, lpd.iou.canbus[0],

2
hw/arm/xlnx-zynqmp.c
View file

@ -857,7 +857,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
}
}
static Property xlnx_zynqmp_props[] = {
static const Property xlnx_zynqmp_props[] = {
DEFINE_PROP_STRING("boot-cpu", XlnxZynqMPState, boot_cpu),
DEFINE_PROP_BOOL("secure", XlnxZynqMPState, secure, false),
DEFINE_PROP_BOOL("virtualization", XlnxZynqMPState, virt, false),

2
hw/audio/ac97.c
View file

@ -1324,7 +1324,7 @@ static void ac97_exit(PCIDevice *dev)
AUD_remove_card(&s->card);
}
static Property ac97_properties[] = {
static const Property ac97_properties[] = {
DEFINE_AUDIO_PROPERTIES(AC97LinkState, card),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/audio/adlib.c
View file

@ -297,7 +297,7 @@ static void adlib_realizefn (DeviceState *dev, Error **errp)
portio_list_add (&s->port_list, isa_address_space_io(&s->parent_obj), 0);
}
static Property adlib_properties[] = {
static const Property adlib_properties[] = {
DEFINE_AUDIO_PROPERTIES(AdlibState, card),
DEFINE_PROP_UINT32 ("iobase", AdlibState, port, 0x220),
DEFINE_PROP_UINT32 ("freq", AdlibState, freq, 44100),

2
hw/audio/asc.c
View file

@ -695,7 +695,7 @@ static void asc_init(Object *obj)
sysbus_init_mmio(sbd, &s->asc);
}
static Property asc_properties[] = {
static const Property asc_properties[] = {
DEFINE_AUDIO_PROPERTIES(ASCState, card),
DEFINE_PROP_UINT8("asctype", ASCState, type, ASC_TYPE_ASC),
DEFINE_PROP_END_OF_LIST(),

2
hw/audio/cs4231a.c
View file

@ -689,7 +689,7 @@ static void cs4231a_realizefn (DeviceState *dev, Error **errp)
isa_register_ioport (d, &s->ioports, s->port);
}
static Property cs4231a_properties[] = {
static const Property cs4231a_properties[] = {
DEFINE_AUDIO_PROPERTIES(CSState, card),
DEFINE_PROP_UINT32 ("iobase", CSState, port, 0x534),
DEFINE_PROP_UINT32 ("irq", CSState, irq, 9),

2
hw/audio/es1370.c
View file

@ -868,7 +868,7 @@ static void es1370_exit(PCIDevice *dev)
AUD_remove_card(&s->card);
}
static Property es1370_properties[] = {
static const Property es1370_properties[] = {
DEFINE_AUDIO_PROPERTIES(ES1370State, card),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/audio/gus.c
View file

@ -290,7 +290,7 @@ static void gus_realizefn (DeviceState *dev, Error **errp)
AUD_set_active_out (s->voice, 1);
}
static Property gus_properties[] = {
static const Property gus_properties[] = {
DEFINE_AUDIO_PROPERTIES(GUSState, card),
DEFINE_PROP_UINT32 ("freq", GUSState, freq, 44100),
DEFINE_PROP_UINT32 ("iobase", GUSState, port, 0x240),

2
hw/audio/hda-codec.c
View file

@ -857,7 +857,7 @@ static const VMStateDescription vmstate_hda_audio = {
}
};
static Property hda_audio_properties[] = {
static const Property hda_audio_properties[] = {
DEFINE_AUDIO_PROPERTIES(HDAAudioState, card),
DEFINE_PROP_UINT32("debug", HDAAudioState, debug, 0),
DEFINE_PROP_BOOL("mixer", HDAAudioState, mixer, true),

4
hw/audio/intel-hda.c
View file

@ -37,7 +37,7 @@
/* --------------------------------------------------------------------- */
/* hda bus */
static Property hda_props[] = {
static const Property hda_props[] = {
DEFINE_PROP_UINT32("cad", HDACodecDevice, cad, -1),
DEFINE_PROP_END_OF_LIST()
};
@ -1215,7 +1215,7 @@ static const VMStateDescription vmstate_intel_hda = {
}
};
static Property intel_hda_properties[] = {
static const Property intel_hda_properties[] = {
DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0),
DEFINE_PROP_ON_OFF_AUTO("msi", IntelHDAState, msi, ON_OFF_AUTO_AUTO),
DEFINE_PROP_BOOL("old_msi_addr", IntelHDAState, old_msi_addr, false),

2
hw/audio/pcspk.c
View file

@ -215,7 +215,7 @@ static const VMStateDescription vmstate_spk = {
}
};
static Property pcspk_properties[] = {
static const Property pcspk_properties[] = {
DEFINE_AUDIO_PROPERTIES(PCSpkState, card),
DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, 0x61),
DEFINE_PROP_BOOL("migrate", PCSpkState, migrate, true),

2
hw/audio/pl041.c
View file

@ -625,7 +625,7 @@ static const VMStateDescription vmstate_pl041 = {
}
};
static Property pl041_device_properties[] = {
static const Property pl041_device_properties[] = {
DEFINE_AUDIO_PROPERTIES(PL041State, codec.card),
/* Non-compact FIFO depth property */
DEFINE_PROP_UINT32("nc_fifo_depth", PL041State, fifo_depth,

2
hw/audio/sb16.c
View file

@ -1440,7 +1440,7 @@ static void sb16_realizefn (DeviceState *dev, Error **errp)
s->can_write = 1;
}
static Property sb16_properties[] = {
static const Property sb16_properties[] = {
DEFINE_AUDIO_PROPERTIES(SB16State, card),
DEFINE_PROP_UINT32 ("version", SB16State, ver, 0x0405), /* 4.5 */
DEFINE_PROP_UINT32 ("iobase", SB16State, port, 0x220),

2
hw/audio/via-ac97.c
View file

@ -459,7 +459,7 @@ static void via_ac97_exit(PCIDevice *dev)
AUD_remove_card(&s->card);
}
static Property via_ac97_properties[] = {
static const Property via_ac97_properties[] = {
DEFINE_AUDIO_PROPERTIES(ViaAC97State, card),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/audio/virtio-snd-pci.c
View file

@ -27,7 +27,7 @@ struct VirtIOSoundPCI {
VirtIOSound vdev;
};
static Property virtio_snd_pci_properties[] = {
static const Property virtio_snd_pci_properties[] = {
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),

2
hw/audio/virtio-snd.c
View file

@ -77,7 +77,7 @@ static const VMStateDescription vmstate_virtio_snd = {
},
};
static Property virtio_snd_properties[] = {
static const Property virtio_snd_properties[] = {
DEFINE_AUDIO_PROPERTIES(VirtIOSound, card),
DEFINE_PROP_UINT32("jacks", VirtIOSound, snd_conf.jacks,
VIRTIO_SOUND_JACK_DEFAULT),

2
hw/audio/wm8750.c
View file

@ -706,7 +706,7 @@ void wm8750_set_bclk_in(void *opaque, int new_hz)
wm8750_clk_update(s, 1);
}
static Property wm8750_properties[] = {
static const Property wm8750_properties[] = {
DEFINE_AUDIO_PROPERTIES(WM8750State, card),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/avr/atmega.c
View file

@ -355,7 +355,7 @@ static void atmega_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("avr-eeprom", OFFSET_DATA + 0x03f, 3);
}
static Property atmega_props[] = {
static const Property atmega_props[] = {
DEFINE_PROP_UINT64("xtal-frequency-hz", AtmegaMcuState,
xtal_freq_hz, 0),
DEFINE_PROP_END_OF_LIST()

2
hw/block/fdc-isa.c
View file

@ -283,7 +283,7 @@ static const VMStateDescription vmstate_isa_fdc = {
}
};
static Property isa_fdc_properties[] = {
static const Property isa_fdc_properties[] = {
DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0),
DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),

4
hw/block/fdc-sysbus.c
View file

@ -196,7 +196,7 @@ static const TypeInfo sysbus_fdc_common_typeinfo = {
.class_size = sizeof(FDCtrlSysBusClass),
};
static Property sysbus_fdc_properties[] = {
static const Property sysbus_fdc_properties[] = {
DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
FloppyDriveType),
@ -223,7 +223,7 @@ static const TypeInfo sysbus_fdc_typeinfo = {
.class_init = sysbus_fdc_class_init,
};
static Property sun4m_fdc_properties[] = {
static const Property sun4m_fdc_properties[] = {
DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
FloppyDriveType),

2
hw/block/fdc.c
View file

@ -454,7 +454,7 @@ struct FloppyDrive {
FloppyDriveType type;
};
static Property floppy_drive_properties[] = {
static const Property floppy_drive_properties[] = {
DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1),
DEFINE_BLOCK_PROPERTIES(FloppyDrive, conf),
DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type,

2
hw/block/m25p80.c
View file

@ -1720,7 +1720,7 @@ static int m25p80_pre_save(void *opaque)
return 0;
}
static Property m25p80_properties[] = {
static const Property m25p80_properties[] = {
/* This is default value for Micron flash */
DEFINE_PROP_BOOL("write-enable", Flash, write_enable, false),
DEFINE_PROP_UINT32("nonvolatile-cfg", Flash, nonvolatile_cfg, 0x8FFF),

2
hw/block/nand.c
View file

@ -445,7 +445,7 @@ static void nand_realize(DeviceState *dev, Error **errp)
s->ioaddr = s->io;
}
static Property nand_properties[] = {
static const Property nand_properties[] = {
DEFINE_PROP_UINT8("manufacturer_id", NANDFlashState, manf_id, 0),
DEFINE_PROP_UINT8("chip_id", NANDFlashState, chip_id, 0),
DEFINE_PROP_DRIVE("drive", NANDFlashState, blk),

2
hw/block/pflash_cfi01.c
View file

@ -895,7 +895,7 @@ static void pflash_cfi01_system_reset(DeviceState *dev)
pfl->blk_offset = -1;
}
static Property pflash_cfi01_properties[] = {
static const Property pflash_cfi01_properties[] = {
DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk),
/* num-blocks is the number of blocks actually visible to the guest,
* ie the total size of the device divided by the sector length.

2
hw/block/pflash_cfi02.c
View file

@ -937,7 +937,7 @@ static void pflash_cfi02_reset(DeviceState *dev)
pflash_reset_state_machine(pfl);
}
static Property pflash_cfi02_properties[] = {
static const Property pflash_cfi02_properties[] = {
DEFINE_PROP_DRIVE("drive", PFlashCFI02, blk),
DEFINE_PROP_UINT32("num-blocks", PFlashCFI02, uniform_nb_blocs, 0),
DEFINE_PROP_UINT32("sector-length", PFlashCFI02, uniform_sector_len, 0),

2
hw/block/swim.c
View file

@ -166,7 +166,7 @@ static const BlockDevOps swim_block_ops = {
.change_media_cb = swim_change_cb,
};
static Property swim_drive_properties[] = {
static const Property swim_drive_properties[] = {
DEFINE_PROP_INT32("unit", SWIMDrive, unit, -1),
DEFINE_BLOCK_PROPERTIES(SWIMDrive, conf),
DEFINE_PROP_END_OF_LIST(),

2
hw/block/vhost-user-blk.c
View file

@ -570,7 +570,7 @@ static const VMStateDescription vmstate_vhost_user_blk = {
},
};
static Property vhost_user_blk_properties[] = {
static const Property vhost_user_blk_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserBlk, chardev),
DEFINE_PROP_UINT16("num-queues", VHostUserBlk, num_queues,
VHOST_USER_BLK_AUTO_NUM_QUEUES),

2
hw/block/virtio-blk.c
View file

@ -1985,7 +1985,7 @@ static const VMStateDescription vmstate_virtio_blk = {
},
};
static Property virtio_blk_properties[] = {
static const Property virtio_blk_properties[] = {
DEFINE_BLOCK_PROPERTIES(VirtIOBlock, conf.conf),
DEFINE_BLOCK_ERROR_PROPERTIES(VirtIOBlock, conf.conf),
DEFINE_BLOCK_CHS_PROPERTIES(VirtIOBlock, conf.conf),

4
hw/block/xen-block.c
View file

@ -659,14 +659,14 @@ invalid:
*
* https://xenbits.xen.org/docs/unstable/man/xen-vbd-interface.7.html
*/
const PropertyInfo xen_block_prop_vdev = {
static const PropertyInfo xen_block_prop_vdev = {
.name = "str",
.description = "Virtual Disk specifier: d*p*/xvd*/hd*/sd*",
.get = xen_block_get_vdev,
.set = xen_block_set_vdev,
};
static Property xen_block_props[] = {
static const Property xen_block_props[] = {
DEFINE_PROP("vdev", XenBlockDevice, props.vdev,
xen_block_prop_vdev, XenBlockVdev),
DEFINE_BLOCK_PROPERTIES(XenBlockDevice, props.conf),

2
hw/char/avr_usart.c
View file

@ -259,7 +259,7 @@ static const MemoryRegionOps avr_usart_ops = {
.impl = {.min_access_size = 1, .max_access_size = 1}
};
static Property avr_usart_properties[] = {
static const Property avr_usart_properties[] = {
DEFINE_PROP_CHR("chardev", AVRUsartState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/bcm2835_aux.c
View file

@ -290,7 +290,7 @@ static void bcm2835_aux_realize(DeviceState *dev, Error **errp)
bcm2835_aux_receive, NULL, NULL, s, NULL, true);
}
static Property bcm2835_aux_props[] = {
static const Property bcm2835_aux_props[] = {
DEFINE_PROP_CHR("chardev", BCM2835AuxState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/cadence_uart.c
View file

@ -617,7 +617,7 @@ static const VMStateDescription vmstate_cadence_uart = {
},
};
static Property cadence_uart_properties[] = {
static const Property cadence_uart_properties[] = {
DEFINE_PROP_CHR("chardev", CadenceUARTState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/cmsdk-apb-uart.c
View file

@ -377,7 +377,7 @@ static const VMStateDescription cmsdk_apb_uart_vmstate = {
}
};
static Property cmsdk_apb_uart_properties[] = {
static const Property cmsdk_apb_uart_properties[] = {
DEFINE_PROP_CHR("chardev", CMSDKAPBUART, chr),
DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBUART, pclk_frq, 0),
DEFINE_PROP_END_OF_LIST(),

2
hw/char/debugcon.c
View file

@ -114,7 +114,7 @@ static void debugcon_isa_realizefn(DeviceState *dev, Error **errp)
isa->iobase, &s->io);
}
static Property debugcon_isa_properties[] = {
static const Property debugcon_isa_properties[] = {
DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9),
DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9),

2
hw/char/digic-uart.c
View file

@ -172,7 +172,7 @@ static const VMStateDescription vmstate_digic_uart = {
}
};
static Property digic_uart_properties[] = {
static const Property digic_uart_properties[] = {
DEFINE_PROP_CHR("chardev", DigicUartState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/escc.c
View file

@ -1089,7 +1089,7 @@ static void escc_realize(DeviceState *dev, Error **errp)
}
}
static Property escc_properties[] = {
static const Property escc_properties[] = {
DEFINE_PROP_UINT32("frequency", ESCCState, frequency, 0),
DEFINE_PROP_UINT32("it_shift", ESCCState, it_shift, 0),
DEFINE_PROP_BOOL("bit_swap", ESCCState, bit_swap, false),

2
hw/char/exynos4210_uart.c
View file

@ -704,7 +704,7 @@ static void exynos4210_uart_realize(DeviceState *dev, Error **errp)
NULL, s, NULL, true);
}
static Property exynos4210_uart_properties[] = {
static const Property exynos4210_uart_properties[] = {
DEFINE_PROP_CHR("chardev", Exynos4210UartState, chr),
DEFINE_PROP_UINT32("channel", Exynos4210UartState, channel, 0),
DEFINE_PROP_UINT32("rx-size", Exynos4210UartState, rx.size, 16),

2
hw/char/goldfish_tty.c
View file

@ -241,7 +241,7 @@ static const VMStateDescription vmstate_goldfish_tty = {
}
};
static Property goldfish_tty_properties[] = {
static const Property goldfish_tty_properties[] = {
DEFINE_PROP_CHR("chardev", GoldfishTTYState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/grlib_apbuart.c
View file

@ -277,7 +277,7 @@ static void grlib_apbuart_reset(DeviceState *d)
uart->current = 0;
}
static Property grlib_apbuart_properties[] = {
static const Property grlib_apbuart_properties[] = {
DEFINE_PROP_CHR("chrdev", UART, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/ibex_uart.c
View file

@ -508,7 +508,7 @@ static const VMStateDescription vmstate_ibex_uart = {
}
};
static Property ibex_uart_properties[] = {
static const Property ibex_uart_properties[] = {
DEFINE_PROP_CHR("chardev", IbexUartState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/imx_serial.c
View file

@ -438,7 +438,7 @@ static void imx_serial_init(Object *obj)
sysbus_init_irq(sbd, &s->irq);
}
static Property imx_serial_properties[] = {
static const Property imx_serial_properties[] = {
DEFINE_PROP_CHR("chardev", IMXSerialState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/ipoctal232.c
View file

@ -558,7 +558,7 @@ static void ipoctal_realize(DeviceState *dev, Error **errp)
}
}
static Property ipoctal_properties[] = {
static const Property ipoctal_properties[] = {
DEFINE_PROP_CHR("chardev0", IPOctalState, ch[0].dev),
DEFINE_PROP_CHR("chardev1", IPOctalState, ch[1].dev),
DEFINE_PROP_CHR("chardev2", IPOctalState, ch[2].dev),

2
hw/char/mcf_uart.c
View file

@ -312,7 +312,7 @@ static void mcf_uart_realize(DeviceState *dev, Error **errp)
mcf_uart_event, NULL, s, NULL, true);
}
static Property mcf_uart_properties[] = {
static const Property mcf_uart_properties[] = {
DEFINE_PROP_CHR("chardev", mcf_uart_state, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/nrf51_uart.c
View file

@ -304,7 +304,7 @@ static const VMStateDescription nrf51_uart_vmstate = {
}
};
static Property nrf51_uart_properties[] = {
static const Property nrf51_uart_properties[] = {
DEFINE_PROP_CHR("chardev", NRF51UARTState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/parallel.c
View file

@ -603,7 +603,7 @@ bool parallel_mm_init(MemoryRegion *address_space,
return true;
}
static Property parallel_isa_properties[] = {
static const Property parallel_isa_properties[] = {
DEFINE_PROP_UINT32("index", ISAParallelState, index, -1),
DEFINE_PROP_UINT32("iobase", ISAParallelState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7),

2
hw/char/pl011.c
View file

@ -603,7 +603,7 @@ static const VMStateDescription vmstate_pl011 = {
}
};
static Property pl011_properties[] = {
static const Property pl011_properties[] = {
DEFINE_PROP_CHR("chardev", PL011State, chr),
DEFINE_PROP_BOOL("migrate-clk", PL011State, migrate_clk, true),
DEFINE_PROP_END_OF_LIST(),

2
hw/char/renesas_sci.c
View file

@ -319,7 +319,7 @@ static const VMStateDescription vmstate_rsci = {
}
};
static Property rsci_properties[] = {
static const Property rsci_properties[] = {
DEFINE_PROP_UINT64("input-freq", RSCIState, input_freq, 0),
DEFINE_PROP_CHR("chardev", RSCIState, chr),
DEFINE_PROP_END_OF_LIST(),

2
hw/char/sclpconsole-lm.c
View file

@ -333,7 +333,7 @@ static void console_reset(DeviceState *dev)
scon->write_errors = 0;
}
static Property console_properties[] = {
static const Property console_properties[] = {
DEFINE_PROP_CHR("chardev", SCLPConsoleLM, chr),
DEFINE_PROP_UINT32("write_errors", SCLPConsoleLM, write_errors, 0),
DEFINE_PROP_BOOL("echo", SCLPConsoleLM, echo, true),

2
hw/char/sclpconsole.c
View file

@ -251,7 +251,7 @@ static void console_reset(DeviceState *dev)
scon->notify = false;
}
static Property console_properties[] = {
static const Property console_properties[] = {
DEFINE_PROP_CHR("chardev", SCLPConsole, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/serial-isa.c
View file

@ -113,7 +113,7 @@ static const VMStateDescription vmstate_isa_serial = {
}
};
static Property serial_isa_properties[] = {
static const Property serial_isa_properties[] = {
DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),

2
hw/char/serial-mm.c
View file

@ -125,7 +125,7 @@ static void serial_mm_instance_init(Object *o)
qdev_alias_all_properties(DEVICE(&smm->serial), o);
}
static Property serial_mm_properties[] = {
static const Property serial_mm_properties[] = {
/*
* Set the spacing between adjacent memory-mapped UART registers.
* Each register will be at (1 << regshift) bytes after the previous one.

4
hw/char/serial-pci-multi.c
View file

@ -132,14 +132,14 @@ static const VMStateDescription vmstate_pci_multi_serial = {
}
};
static Property multi_2x_serial_pci_properties[] = {
static const Property multi_2x_serial_pci_properties[] = {
DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
DEFINE_PROP_END_OF_LIST(),
};
static Property multi_4x_serial_pci_properties[] = {
static const Property multi_4x_serial_pci_properties[] = {
DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),

2
hw/char/serial-pci.c
View file

@ -81,7 +81,7 @@ static const VMStateDescription vmstate_pci_serial = {
}
};
static Property serial_pci_properties[] = {
static const Property serial_pci_properties[] = {
DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/serial.c
View file

@ -964,7 +964,7 @@ const MemoryRegionOps serial_io_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
static Property serial_properties[] = {
static const Property serial_properties[] = {
DEFINE_PROP_CHR("chardev", SerialState, chr),
DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200),
DEFINE_PROP_BOOL("wakeup", SerialState, wakeup, false),

2
hw/char/sh_serial.c
View file

@ -447,7 +447,7 @@ static void sh_serial_init(Object *obj)
{
}
static Property sh_serial_properties[] = {
static const Property sh_serial_properties[] = {
DEFINE_PROP_CHR("chardev", SHSerialState, chr),
DEFINE_PROP_UINT8("features", SHSerialState, feat, 0),
DEFINE_PROP_END_OF_LIST()

2
hw/char/shakti_uart.c
View file

@ -157,7 +157,7 @@ static void shakti_uart_instance_init(Object *obj)
sysbus_init_mmio(SYS_BUS_DEVICE(obj), &sus->mmio);
}
static Property shakti_uart_properties[] = {
static const Property shakti_uart_properties[] = {
DEFINE_PROP_CHR("chardev", ShaktiUartState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/sifive_uart.c
View file

@ -251,7 +251,7 @@ static int sifive_uart_be_change(void *opaque)
return 0;
}
static Property sifive_uart_properties[] = {
static const Property sifive_uart_properties[] = {
DEFINE_PROP_CHR("chardev", SiFiveUARTState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/spapr_vty.c
View file

@ -163,7 +163,7 @@ void spapr_vty_create(SpaprVioBus *bus, Chardev *chardev)
qdev_realize_and_unref(dev, &bus->bus, &error_fatal);
}
static Property spapr_vty_properties[] = {
static const Property spapr_vty_properties[] = {
DEFINE_SPAPR_PROPERTIES(SpaprVioVty, sdev),
DEFINE_PROP_CHR("chardev", SpaprVioVty, chardev),
DEFINE_PROP_END_OF_LIST(),

2
hw/char/stm32f2xx_usart.c
View file

@ -199,7 +199,7 @@ static const MemoryRegionOps stm32f2xx_usart_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
static Property stm32f2xx_usart_properties[] = {
static const Property stm32f2xx_usart_properties[] = {
DEFINE_PROP_CHR("chardev", STM32F2XXUsartState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/stm32l4x5_usart.c
View file

@ -534,7 +534,7 @@ static const MemoryRegionOps stm32l4x5_usart_base_ops = {
},
};
static Property stm32l4x5_usart_base_properties[] = {
static const Property stm32l4x5_usart_base_properties[] = {
DEFINE_PROP_CHR("chardev", Stm32l4x5UsartBaseState, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/terminal3270.c
View file

@ -283,7 +283,7 @@ static int write_payload_3270(EmulatedCcw3270Device *dev, uint8_t cmd)
return (retval <= 0) ? 0 : get_cds(t)->count;
}
static Property terminal_properties[] = {
static const Property terminal_properties[] = {
DEFINE_PROP_CHR("chardev", Terminal3270, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/char/virtio-console.c
View file

@ -274,7 +274,7 @@ static const TypeInfo virtconsole_info = {
.class_init = virtconsole_class_init,
};
static Property virtserialport_properties[] = {
static const Property virtserialport_properties[] = {
DEFINE_PROP_CHR("chardev", VirtConsole, chr),
DEFINE_PROP_END_OF_LIST(),
};

4
hw/char/virtio-serial-bus.c
View file

@ -835,7 +835,7 @@ static int virtio_serial_load_device(VirtIODevice *vdev, QEMUFile *f,
static void virtser_bus_dev_print(Monitor *mon, DeviceState *qdev, int indent);
static Property virtser_props[] = {
static const Property virtser_props[] = {
DEFINE_PROP_UINT32("nr", VirtIOSerialPort, id, VIRTIO_CONSOLE_BAD_ID),
DEFINE_PROP_STRING("name", VirtIOSerialPort, name),
DEFINE_PROP_END_OF_LIST()
@ -1153,7 +1153,7 @@ static const VMStateDescription vmstate_virtio_console = {
},
};
static Property virtio_serial_properties[] = {
static const Property virtio_serial_properties[] = {
DEFINE_PROP_UINT32("max_ports", VirtIOSerial, serial.max_virtserial_ports,
31),
DEFINE_PROP_BIT64("emergency-write", VirtIOSerial, host_features,

2
hw/char/xen_console.c
View file

@ -487,7 +487,7 @@ static char *xen_console_get_frontend_path(XenDevice *xendev, Error **errp)
}
static Property xen_console_properties[] = {
static const Property xen_console_properties[] = {
DEFINE_PROP_CHR("chardev", XenConsole, chr),
DEFINE_PROP_INT32("idx", XenConsole, dev, -1),
DEFINE_PROP_END_OF_LIST(),

2
hw/char/xilinx_uartlite.c
View file

@ -176,7 +176,7 @@ static const MemoryRegionOps uart_ops = {
}
};
static Property xilinx_uartlite_properties[] = {
static const Property xilinx_uartlite_properties[] = {
DEFINE_PROP_CHR("chardev", XilinxUARTLite, chr),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/core/generic-loader.c
View file

@ -179,7 +179,7 @@ static void generic_loader_unrealize(DeviceState *dev)
qemu_unregister_reset(generic_loader_reset, dev);
}
static Property generic_loader_props[] = {
static const Property generic_loader_props[] = {
DEFINE_PROP_UINT64("addr", GenericLoaderState, addr, 0),
DEFINE_PROP_UINT64("data", GenericLoaderState, data, 0),
DEFINE_PROP_UINT8("data-len", GenericLoaderState, data_len, 0),

2
hw/core/guest-loader.c
View file

@ -111,7 +111,7 @@ static void guest_loader_realize(DeviceState *dev, Error **errp)
loader_insert_platform_data(s, size, errp);
}
static Property guest_loader_props[] = {
static const Property guest_loader_props[] = {
DEFINE_PROP_UINT64("addr", GuestLoaderState, addr, 0),
DEFINE_PROP_STRING("kernel", GuestLoaderState, kernel),
DEFINE_PROP_STRING("bootargs", GuestLoaderState, args),

2
hw/core/or-irq.c
View file

@ -115,7 +115,7 @@ static const VMStateDescription vmstate_or_irq = {
},
};
static Property or_irq_properties[] = {
static const Property or_irq_properties[] = {
DEFINE_PROP_UINT16("num-lines", OrIRQState, num_lines, 1),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/core/platform-bus.c
View file

@ -204,7 +204,7 @@ static void platform_bus_realize(DeviceState *dev, Error **errp)
plaform_bus_refresh_irqs(pbus);
}
static Property platform_bus_properties[] = {
static const Property platform_bus_properties[] = {
DEFINE_PROP_UINT32("num_irqs", PlatformBusDevice, num_irqs, 0),
DEFINE_PROP_UINT32("mmio_size", PlatformBusDevice, mmio_size, 0),
DEFINE_PROP_END_OF_LIST()

2
hw/core/split-irq.c
View file

@ -59,7 +59,7 @@ static void split_irq_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_out(dev, s->out_irq, s->num_lines);
}
static Property split_irq_properties[] = {
static const Property split_irq_properties[] = {
DEFINE_PROP_UINT16("num-lines", SplitIRQ, num_lines, 1),
DEFINE_PROP_END_OF_LIST(),
};

2
hw/cpu/a15mpcore.c
View file

@ -144,7 +144,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp)
}
}
static Property a15mp_priv_properties[] = {
static const Property a15mp_priv_properties[] = {
DEFINE_PROP_UINT32("num-cpu", A15MPPrivState, num_cpu, 1),
/* The Cortex-A15MP may have anything from 0 to 224 external interrupt
* IRQ lines (with another 32 internal). We default to 128+32, which

2
hw/cpu/a9mpcore.c
View file

@ -158,7 +158,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp)
}
}
static Property a9mp_priv_properties[] = {
static const Property a9mp_priv_properties[] = {
DEFINE_PROP_UINT32("num-cpu", A9MPPrivState, num_cpu, 1),
/* The Cortex-A9MP may have anything from 0 to 224 external interrupt
* IRQ lines (with another 32 internal). We default to 64+32, which

2
hw/cpu/arm11mpcore.c
View file

@ -131,7 +131,7 @@ static void mpcore_priv_initfn(Object *obj)
object_initialize_child(obj, "wdtimer", &s->wdtimer, TYPE_ARM_MPTIMER);
}
static Property mpcore_priv_properties[] = {
static const Property mpcore_priv_properties[] = {
DEFINE_PROP_UINT32("num-cpu", ARM11MPCorePriveState, num_cpu, 1),
/* The ARM11 MPCORE TRM says the on-chip controller may have
* anything from 0 to 224 external interrupt IRQ lines (with another

2
hw/cpu/cluster.c
View file

@ -25,7 +25,7 @@
#include "hw/qdev-properties.h"
#include "qapi/error.h"
static Property cpu_cluster_properties[] = {
static const Property cpu_cluster_properties[] = {
DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0),
DEFINE_PROP_END_OF_LIST()
};

Some files were not shown because too many files have changed in this diff Show more