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hw/nvme: split pmrmsc register into upper and lower

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The specification uses a set of 32 bit PMRMSCL and PMRMSCU registers to
make up the 64 bit logical PMRMSC register.

Make it so.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
This commit is contained in:
Klaus Jensen 2021-07-13 14:34:52 +02:00
parent 5ffbaeed16
commit 5d45edbeac
2 changed files with 22 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

10
hw/nvme/ctrl.c
View file

@ -5916,11 +5916,13 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
return;
}
n->bar.pmrmsc = (n->bar.pmrmsc & ~0xffffffff) | (data & 0xffffffff);
n->bar.pmrmscl = data;
n->pmr.cmse = false;
if (NVME_PMRMSC_CMSE(n->bar.pmrmsc)) {
hwaddr cba = NVME_PMRMSC_CBA(n->bar.pmrmsc) << PMRMSC_CBA_SHIFT;
if (NVME_PMRMSCL_CMSE(n->bar.pmrmscl)) {
uint64_t pmrmscu = n->bar.pmrmscu;
hwaddr cba = (pmrmscu << 32) |
(NVME_PMRMSCL_CBA(n->bar.pmrmscl) << PMRMSCL_CBA_SHIFT);
if (cba + int128_get64(n->pmr.dev->mr.size) < cba) {
NVME_PMRSTS_SET_CBAI(n->bar.pmrsts, 1);
return;
@ -5936,7 +5938,7 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
return;
}
n->bar.pmrmsc = (n->bar.pmrmsc & 0xffffffff) | (data << 32);
n->bar.pmrmscu = data;
return;
default:
NVME_GUEST_ERR(pci_nvme_ub_mmiowr_invalid,