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tcg: Implement gvec support for rotate by vector
No host backend support yet, but the interfaces for rotlv and rotrv are in place. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v3: Drop the generic expansion from rot to shift; we can do better for each backend, and then this code becomes unused.
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13 changed files with 256 additions and 1 deletions
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@ -908,6 +908,102 @@ void HELPER(gvec_sar64v)(void *d, void *a, void *b, uint32_t desc)
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotl8v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
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uint8_t sh = *(uint8_t *)(b + i) & 7;
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*(uint8_t *)(d + i) = rol8(*(uint8_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotl16v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
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uint8_t sh = *(uint16_t *)(b + i) & 15;
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*(uint16_t *)(d + i) = rol16(*(uint16_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotl32v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
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uint8_t sh = *(uint32_t *)(b + i) & 31;
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*(uint32_t *)(d + i) = rol32(*(uint32_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotl64v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
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uint8_t sh = *(uint64_t *)(b + i) & 63;
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*(uint64_t *)(d + i) = rol64(*(uint64_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotr8v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint8_t)) {
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uint8_t sh = *(uint8_t *)(b + i) & 7;
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*(uint8_t *)(d + i) = ror8(*(uint8_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotr16v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint16_t)) {
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uint8_t sh = *(uint16_t *)(b + i) & 15;
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*(uint16_t *)(d + i) = ror16(*(uint16_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotr32v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint32_t)) {
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uint8_t sh = *(uint32_t *)(b + i) & 31;
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*(uint32_t *)(d + i) = ror32(*(uint32_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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void HELPER(gvec_rotr64v)(void *d, void *a, void *b, uint32_t desc)
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{
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intptr_t oprsz = simd_oprsz(desc);
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intptr_t i;
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for (i = 0; i < oprsz; i += sizeof(uint64_t)) {
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uint8_t sh = *(uint64_t *)(b + i) & 63;
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*(uint64_t *)(d + i) = ror64(*(uint64_t *)(a + i), sh);
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}
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clear_high(d, oprsz, desc);
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}
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#define DO_CMP1(NAME, TYPE, OP) \
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void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc) \
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{ \
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@ -279,6 +279,16 @@ DEF_HELPER_FLAGS_4(gvec_sar16v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_sar32v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_sar64v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotl8v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotl16v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotl32v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotl64v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotr8v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotr16v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotr32v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_rotr64v, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_eq8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_eq16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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DEF_HELPER_FLAGS_4(gvec_eq32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
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